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* gallium/freedreno: handle query_renderer capsEmil Velikov2014-08-151-0/+12
| | | | | | | | | | Provide the real vendor and and hardcode the device id as 0xffffffff as the devices currently using freedreno are non-pci. The device features UMA. Cc: Rob Clark <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* r600g: Implement ARB_derivative_controlGlenn Kennard2014-08-152-10/+12
| | | | | | | | | Requires Evergreen/Cayman marek: update release notes Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* nv50,nvc0: add support for fine derivativesIlia Mirkin2014-08-143-2/+6
| | | | | | | The quadop-based method we currently use on all chipsets already provides the fine version of the derivatives. Signed-off-by: Ilia Mirkin <[email protected]>
* gallium: add opcodes/cap for fine derivative supportIlia Mirkin2014-08-1413-0/+13
| | | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> (v1) Reviewed-by: Roland Scheidegger <[email protected]> (v1) v2: Reuse opcode gaps as suggested by Marek
* r600g: Implement BPTC texture supportGlenn Kennard2014-08-151-0/+24
| | | | | | | Requires Evergreen/Cayman Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: implement BPTC texture supportGrigori Goronzy2014-08-141-0/+20
| | | | | | | | Passes all piglit tests. v2: rebased Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: fix buffer invalidation of unbound texture buffer objectsMarek Olšák2014-08-143-7/+17
| | | | | | | This maintains a list of all TBOs in a pipe_context. Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* r600g: implement invalidation of texture buffer objectsMarek Olšák2014-08-145-5/+51
| | | | | | This fixes piglit spec/ARB_texture_buffer_object/data-sync. Reviewed-by: Alex Deucher <[email protected]>
* r600g: fix constant buffer fetchesMarek Olšák2014-08-141-0/+1
| | | | | | | | | Somebody forgot to do this. It was uncovered by recent st/mesa changes. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82139 Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]> Tested-by: Andreas Boll <[email protected]>
* r600g: clear constant buffer sizes at the beginning of CSMarek Olšák2014-08-143-87/+49
| | | | Reviewed-by: Alex Deucher <[email protected]>
* svga: remove some unneeded INLINE qualifiersBrian Paul2014-08-143-5/+5
| | | | Trivial.
* r300g: Fix bug in build_loop_info()/compiler v2Tom Stellard2014-08-131-11/+23
| | | | | | | | | | | Fixes piglit glean "do-loop with continue and break" on RS690 It's based on Tom Stellard patch and improved to handle CMP instruction. [v2] handle CMP instruction Reviewed-by: Tom Stellard <[email protected]> Signed-off-by: David Heidelberger <[email protected]>
* radeonsi/compute: Stop leaking the input bufferTom Stellard2014-08-131-7/+14
| | | | | | | | We were leaking the input buffer used for kernel arguments and since we were allocating it using si_upload_const_buffer() we were leaking 1 MB per kernel invocation. CC: "10.2" <[email protected]>
* radeonsi/compute: Whitespace fixesTom Stellard2014-08-131-2/+1
| | | | CC: "10.2" <[email protected]>
* radeonsi/compute: Call si_pm4_free_state() after emitting compute stateTom Stellard2014-08-131-1/+1
| | | | | | | This will decrement the reference count for buffers referenced in the command stream will prevent us from leaking them. CC: "10.2" <[email protected]>
* radeonsi/compute: Update reference counts for buffers in si_set_global_binding()Tom Stellard2014-08-131-2/+2
| | | | CC: "10.2" <[email protected]>
* radeon/compute: Report a value for PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZETom Stellard2014-08-132-1/+17
| | | | CC: "10.2" <[email protected]>
* radeon/compute: Fix reported values for MAX_GLOBAL_SIZE and MAX_MEM_ALLOC_SIZETom Stellard2014-08-131-13/+19
| | | | | | | | There is a hard limit in older kernels of 256 MB for buffer allocations, so report this value as MAX_MEM_ALLOC_SIZE and adjust MAX_GLOBAL_SIZE to statisfy requirements of OpenCL. CC: "10.2" <[email protected]>
* ra: cleanup the public APIConnor Abbott2014-08-131-1/+1
| | | | | | | | | | | | | | Previously, there were 3 entrypoints into parts of the actual allocator, and an API called ra_allocate_no_spills() that called all 3. Nobody would ever want to call any of the 3 entrypoints by themselves, so everybody just used ra_allocate_no_spills(). So just make them static functions, and while we're at it rename ra_allocate_no_spills() to ra_allocate() since there's no equivalent "with spills," because the backend is supposed to handle spilling. Signed-off-by: Connor Abbott <[email protected]> Reviewed-by: Eric Anholt <[email protected]> Reviewed-by: Kenneth Graunke <[email protected]>
* nvc0: increase GLSL level to 400 to enable ARB_gpu_shader5Ilia Mirkin2014-08-131-1/+1
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* automake: compact gallium/drivers and gallium/winsys makefilesEmil Velikov2014-08-131-100/+0
| | | | | | | | | | | | Rather than having two separate almost empty and identical makefiles, compact them thus improving the configure and build time. Additionally this makes the automake build symmetrical to the scons and android one. v2: Rebase on top of vc4, compact drivers + winsys on a single line. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Matt Turner <[email protected]>
* android: gallium/freedreno: add preliminary buildEmil Velikov2014-08-131-0/+44
| | | | | | | | | | | | | | | | | | For all the people interested in testing the freedreno driver on their Android devices. The next commit will hook these up within the libEGL driver (via the gallium-egl backend). There may be some rough edges but those can be sorted when a willing builder/tester comes along. v2: - s/freefreno/freedreno/. Spotted by Matt Turner. - Use the installed libdrm headers. Cc: "10.1 10.2" <[email protected]> Cc: Rob Clark <[email protected]> Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]>
* automake: gallium/freedreno: drop spurious include dirsEmil Velikov2014-08-132-4/+2
| | | | | | | | | | | Rather than including two extra folders only for two headers, just prefix the headers and be done with it. Cc: "10.1 10.2" <[email protected]> Cc: Rob Clark <[email protected]> Cc: [email protected] Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Rob Clark <[email protected]>
* android: gallium/radeon: attempt to fix the android buildPaulo Sergio Travaglia2014-08-134-4/+41
| | | | | | | | | | | - include the correct folders - add a new buildscript for the common radeon folder v2: Use the installed libdrm headers over the DRM_TOP ones. Cc: "10.1 10.2" <[email protected]> [Emil Velikov] Split up and add commit message. Signed-off-by: Emil Velikov <[email protected]>
* android: gallium/nouveau: fix include folders, link against libstlportEmil Velikov2014-08-131-4/+5
| | | | | | | | | | | nouveau uses STL for a while now thus we need to include external/stlport/libstlport.mk in order to get the build at least partially working. v2: Use the installed libdrm headers over the DRM_TOP ones. Cc: "10.1 10.2" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* nvc0: add BPTC format supportIlia Mirkin2014-08-121-0/+7
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* softpipe,llvmpipe: mark BPTC formats as unsupportedIlia Mirkin2014-08-122-0/+10
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* vc4: Drop the dump_fbo() routine.Eric Anholt2014-08-121-50/+0
| | | | | Now that eglkms is working, and some tests are working under PIGLIT_PLATFORM=gbm, I don't think I need this any more.
* vc4: Claim the GL 2.1 minimum for 3D textures.Eric Anholt2014-08-121-1/+2
| | | | | | | We don't actually do them (or even fake them) currently, but it does get us a bunch of unrelated glean glsl1 tests passing, which previously would error out due to glean assuming the minimums on a 3D texture that 2 of the subtests use.
* vc4: Declare what vertex formats we actually support.Eric Anholt2014-08-121-2/+7
| | | | | We will support more than this eventually, but for now this makes u_vbuf format-convert a few things (32-bit snorm and scaled, doubles) for us.
* vc4: Stash some debug code for format support checks.Eric Anholt2014-08-121-0/+9
| | | | | | This can be useful for looking at context init setup and texture format choices, and there's no reason for the silly retval computation we do if you're not going to have this code (mostly from freedreno) around.
* vc4: Texture format support has nothing to do with VBO format support.Eric Anholt2014-08-121-2/+1
| | | | This was inherited from freedreno, but doesn't apply to us.
* vc4: Fix off-by-one in texture maximum levels.Eric Anholt2014-08-121-1/+1
| | | | It's 2048x2048 that's the max, not 1024x1024.
* vc4: Add support for the FLR opcode.Eric Anholt2014-08-121-0/+18
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* gallium/r300: Fix a link error in the testsJason Ekstrand2014-08-121-1/+1
| | | | | | | | | The link error occurs because the static libraries are linked in the wrong order. This fixes it. Signed-off-by: Jason Ekstrand <[email protected]> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=82483 Reviewed-by: Tom Stellard <[email protected]>
* svga: Add a limit to the maximum surface sizeCharmaine Lee2014-08-125-5/+71
| | | | | | | | | This patch adds a limit to the maximum surface size which is based on the maximum size of a single mob. If this value is not available, the maximum surface size is by default set to 128 MB. Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* radeon/uvd: fix gpu_address for video surfacesChristian König2014-08-122-0/+4
| | | | | | | | | | | We need to get the new gpu_address as well when reallocating the cs buffer. Bug: https://bugs.freedesktop.org/show_bug.cgi?id=82428 Signed-off-by: Christian König <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Tested-by: Kai Wasserbäch <[email protected]>
* nvc0/ir: describe the tex arguments for fermi/keplerIlia Mirkin2014-08-111-0/+25
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add kepler+ support for indirect texture referencesIlia Mirkin2014-08-111-7/+27
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add base tex offset for fermi indirect tex caseIlia Mirkin2014-08-111-2/+10
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* vc4: Flip which primitives are considered front-facing.Eric Anholt2014-08-111-1/+1
| | | | This mostly fixes glxgears rendering.
* vc4: Don't forget to set the depth clear value in the packet.Eric Anholt2014-08-111-1/+1
| | | | This gets glxgears partially rendering again.
* vc4: Add support for gl_FragCoord.Eric Anholt2014-08-115-4/+76
| | | | | | | This isn't passing all tests (glsl-fs-fragcoord-zw-ortho, for example), but it does get a bunch more tests passing. v2: Rebase on helpers change.
* vc4: Refactor shader input setup again.Eric Anholt2014-08-111-17/+24
| | | | This makes some space for handling special inputs like fragcoords.
* vc4: Clean up the tile alloc buffer size.Eric Anholt2014-08-111-1/+9
| | | | | | | This prevents some simulator assertion failures, but it does mean (since I've dropped the "* 16" padding) that on real hardware you need a kernel that does overflow memory management (currently, "drm/vc4: Add support for binner overflow memory allocation." in my kernel tree).
* vc4: Clarify some values implicitly chosen for binning config.Eric Anholt2014-08-111-1/+4
| | | | These #defines are 0, but it should help make math above make more sense.
* vc4: Improve simulator memory allocation.Eric Anholt2014-08-111-4/+20
| | | | This should reduce a bunch of spurious failures in sim.
* vc4: Handle stride==0 in VBO validationEric Anholt2014-08-111-7/+9
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* vc4: Stash some debug code for looking at what BOs are at what hindex.Eric Anholt2014-08-112-0/+5
| | | | When you're debugging validation, it's nice to know what the BOs are for.
* vc4: Use GEM under simulation even for non-winsys BOs.Eric Anholt2014-08-112-14/+9
| | | | | | | In addition to reducing sim-specific code, it also avoids our local handle allocation conflicting with the host GEM's handle numbering, which was causing vc4_gem_hindex() to not distinguish between winsys BOs and the same-numbered non-winsys bo.
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