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* llvmpipe: get rid of depth swizzling.Roland Scheidegger2013-05-037-273/+414
* r600g: Correctly initialize the shader key, v2Lauri Kasanen2013-05-031-1/+2
* scons: remove nouveau buildAndreas Boll2013-05-034-43/+0
* scons: remove radeon buildAndreas Boll2013-05-033-59/+0
* r600g: don't emit surface_sync after FLUSH_AND_INV_EVENTAlex Deucher2013-05-031-26/+0
* r600g/sb: zero-initialize bytecode structsVadim Girlin2013-05-032-3/+6
* r600g/sb: fix constant propagation in gvn passVadim Girlin2013-05-031-1/+2
* r600g/sb: don't run unnecessary passesVadim Girlin2013-05-031-3/+0
* r600g/sb: silence warnings with gcc 4.8Vadim Girlin2013-05-032-14/+15
* r600g/sb: fix handling of interference sets in post_schedulerVadim Girlin2013-05-032-8/+8
* r600g/sb: fix allocation of indirectly addressed input arraysVadim Girlin2013-05-034-10/+25
* r600g/sb: use hex instead of binary constantsVadim Girlin2013-05-035-15/+15
* r600g: use old shader disassembler by defaultVadim Girlin2013-05-034-19/+18
* radeon/uvd: enable interlaced buffers by defaultChristian König2013-05-032-5/+5
* vl/idct: fix for commit 7d2f2a0c890b1993532a45c8c392c28950ddc06eChristian König2013-05-032-6/+6
* vl/buffers: fix typo in function nameChristian König2013-05-032-6/+6
* radeon/uvd: fix some MPEG4 artifactsChristian König2013-05-031-7/+17
* ilo: use u_reduced_prims_for_vertices()Chia-I Wu2013-05-031-68/+1
* r600g: Don't set the dest cache bits on surface sync for R600_CONTEXT_FLUSH_A...Tom Stellard2013-05-021-15/+13
* r600g/compute: Fix build error in debug codeTom Stellard2013-05-021-1/+1
* radeon: Fix build with LLVM 3.3Armin K2013-05-021-1/+1
* r600/sb: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-0/+1
* radeon/uvd: Fix build failure with non-standard libdrm installation prefixLauri Kasanen2013-05-021-1/+1
* radeon/uvd: fix quant scan order for mpeg2Christian König2013-05-011-2/+6
* vl/buffer: use 2D_ARRAY instead of 3D texturesChristian König2013-05-012-14/+14
* ilo: fix PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERSChia-I Wu2013-05-011-0/+2
* ilo: enable SO support on GEN7Chia-I Wu2013-05-011-3/+4
* ilo: reset SO write offsets for new SO targetsChia-I Wu2013-05-011-6/+15
* ilo: correctly program SO states for GEN7Chia-I Wu2013-05-011-7/+46
* ilo: implement GEN7 SO GPE functionsChia-I Wu2013-05-013-40/+150
* ilo: add gen6_pipeline_update_max_svbi()Chia-I Wu2013-05-012-13/+35
* ilo: expose register indices of OUTs in ilo_shaderChia-I Wu2013-05-014-4/+30
* ilo: allow one-off flags to be specified for CPChia-I Wu2013-05-012-0/+15
* ilo: fix tiling/size for special-purpose resourcesChia-I Wu2013-05-011-2/+30
* ilo: use UMS layout for render targetsChia-I Wu2013-05-014-19/+117
* ilo: support and prefer compact array spacingChia-I Wu2013-05-014-15/+77
* ilo: move device limits to ilo_dev_info or to GPEsChia-I Wu2013-05-0110-96/+127
* ilo: use ilo_dev_info in toy compilerChia-I Wu2013-05-0110-33/+33
* ilo: use ilo_dev_info in GPE and 3D pipelineChia-I Wu2013-05-0112-597/+587
* ilo: add ilo_dev_info shared by the screen and contextsChia-I Wu2013-05-019-51/+71
* ilo: fix indentation of ilo_gpe_gen*.hChia-I Wu2013-05-012-258/+258
* r600g/sb: remove unused codeVadim Girlin2013-04-302-34/+0
* r600g/sb: collect shader statisticsVadim Girlin2013-04-305-8/+162
* r600g/sb: don't propagate dead values in GVN passVadim Girlin2013-04-301-0/+3
* r600g/sb: use simple heuristic to limit register pressureVadim Girlin2013-04-302-3/+33
* r600g/sb: improve error checking in ra_coalesce passVadim Girlin2013-04-302-14/+27
* r600g/sb: use source bytecode in case of optimization errorsVadim Girlin2013-04-305-11/+25
* r600g: plug in optimizing backendVadim Girlin2013-04-308-3/+155
* r600g/sb: initial commit of the optimizing shader backendVadim Girlin2013-04-3035-0/+17498
* r600g: use enum type for domains field in struct r600_resourceVadim Girlin2013-04-301-1/+1
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