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* vc4: Add support for multiple attributesEric Anholt2014-08-084-69/+46
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* vc4: Add more useful debug for the undefined-source caseEric Anholt2014-08-081-5/+12
| | | | | | We could get undefined sources in real programs from the wild, so we'll need to turn off this debug eventually. But for now, using undefined sources is typically me just mistyping something.
* vc4: Add support for the lit opcode.Eric Anholt2014-08-082-1/+45
| | | | | | v2: Fix how it was using the X channel for the real work of the opcode, instead of Y. Fixes glean's LIT test. v3: Rebase on the helpers.
* vc4: Add support for the POW opcodeEric Anholt2014-08-081-0/+15
| | | | v2: Rebase on helpers.
* vc4: Refactor uniform handling.Eric Anholt2014-08-081-27/+27
| | | | | | | I wanted an easy way to set up new uniforms every time, so I could handle texture-sampler-related uniforms. v2: Rebase on helpers change.
* vc4: Add support for the LRP opcode.Eric Anholt2014-08-081-0/+20
| | | | v2: Rebase on helpers, cutting out most of the code in this change.
* vc4: Add copy propagation between temps.Eric Anholt2014-08-084-0/+81
| | | | | | | | We put in a bunch of extra MOVs for program outputs, and this can clean those up. We should do uniforms, too, though. v2: Fix missing flagging of progress when we actually optimize. Caught by Aaron Watry.
* vc4: Add dead code elimination.Eric Anholt2014-08-084-3/+94
| | | | | | This cleans up a bunch of noise in the compiled coordinate shaders (since we don't need the varying outputs), and also from writemasked instructions with negated src operands.
* vc4: Add an initial pass of algebraic optimization.Eric Anholt2014-08-085-4/+125
| | | | | There was a lot of extra noise in my piglit shader dumps because of silly CMPs.
* vc4: Add support for CMP.Eric Anholt2014-08-084-1/+48
| | | | | | | | This took a couple of tries, and this is the squash of those attempts. v2: Fix register file conflicts on the args in the destination-is-accumulator case. v3: Rebase on helper change and qir_inst4 change.
* vc4: Make scheduling of NOPs a separate step from QIR -> QPU translation.Eric Anholt2014-08-083-90/+212
| | | | | This should also be used as a way to pair QIR instructions into QPU instructions later.
* vc4: Add WIP support for varyings.Eric Anholt2014-08-086-8/+59
| | | | | | It doesn't do all the interpolation yet, but more tests can run now. v2: Rebase on helpers.
* vc4: Use r3 instead of r5 for temps, since r5 only has 32 bits of storageEric Anholt2014-08-081-8/+8
| | | | | Reserving a whole accumulator for temps is awful in the first place, but I'll fix that later.
* vc4: Fix emit of ABSEric Anholt2014-08-081-1/+11
| | | | v2: Rebase on qir helpers.
* vc4: Add shader variant caching to handle FS output swizzle.Eric Anholt2014-08-083-65/+232
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* vc4: Load the tile buffer before incrementally drawing.Eric Anholt2014-08-082-27/+50
| | | | | | | We will want to occasionally disable this again when we do clear support. v2: Squash with the previous commit (I accidentally committed at two stages of writing the change)
* vc4: Don't reallocate the tile alloc/state bos every frame.Eric Anholt2014-08-082-10/+21
| | | | | This was a problem for the simulator since we don't free memory back to it, and it would soon just run out.
* vc4: Add VC4_DEBUG env optionEric Anholt2014-08-085-14/+63
| | | | | v2: Fix an accidental deletion of some characters from the copyright message (caught by Ilia Mirkin)
* vc4: Add support for SNE/SEQ/SGE/SLT.Eric Anholt2014-08-086-11/+96
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* vc4: Use the user's actual first vertex attribute.Eric Anholt2014-08-084-35/+70
| | | | | This is hardcoded to read it as RGBA32F so far, but starts to get more tests working.
* vc4: Fix UBO allocation when no uniforms are used.Eric Anholt2014-08-081-1/+2
| | | | We do rely on a real BO getting allocated, so make sure we ask for a non-zero size.
* vc4: Add initial support for math opcodesEric Anholt2014-08-082-1/+41
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* vc4: Switch to actually generating vertex and fragment shader code from TGSI.Eric Anholt2014-08-0812-247/+1243
| | | | | | | | | | | | | | | | | | This introduces an IR (QIR, for QPU IR) to do optimization on. It's a scalar, SSA IR in general. It looks like optimization is pretty easy this way, though I haven't figured out if it's going to be good for our weird register allocation or not (or if I want to reduce to basically QPU instructions first), and I've got some problems with it having some multi-QPU-instruction opcodes (SEQ and CMP, for example) which I probably want to break down. Of course, this commit mostly doesn't work, since many other things are still hardwired, like the VBO data. v2: Rewrite to use a bunch of helpers (qir_OPCODE) for emitting QIR instructions into temporary values, and make qir_inst4 take the 4 args separately instead of an array (all later callers wanted individual args).
* vc4: Start converting the driver to use vertex shaders.Eric Anholt2014-08-083-45/+177
| | | | | | | | Note: This is the cutoff point where I switched from developing primarily on the Pi to developing o the simulator. As a result, from this point on the code is untested on the Pi (the kernel code I have currently wasn't rendering anything at this commit, though the simulator renders successfully, suggesting kernel bugs).
* vc4: Initial skeleton driver import.Eric Anholt2014-08-0826-0/+4438
| | | | | | | | | | | | | | | | | | | This mostly just takes every draw call and turns it into a sequence of commands that clear the FBO and draw a single shaded triangle to it, regardless of the actual input vertices or shaders. I copied the initial driver skeleton mostly from freedreno, and I've preserved Rob Clark's copyright for those. I also based my initial hardcoded shaders and command lists on Scott Mansell (phire)'s "hackdriver" project, though the bit patterns of the shaders emitted end up being different. v2: Rebase on gallium megadrivers changes. v3: Rebase on PIPE_SHADER_CAP_MAX_CONSTS change. v4: Rely on simpenrose actually being installed when building for simulation. v5: Add more header duplicate-include guards. v6: Apply Emil's review (protection against vc4 sim and ilo at the same time, and dropping the dricommon drm bits) and fix a copyright header (thanks, Roland)
* ilo: break down the format tableChia-I Wu2014-08-081-299/+431
| | | | | | | The PRMs no longer have a single table for format capabilities. Multiple tables take up less space, and are easier to maintain. Encode typed write information while at it.
* llvmpipe/tests: automake: link against libmesautil.laEmil Velikov2014-08-051-5/+6
| | | | | | | Or the build will fail due to unresolved symbols. Signed-off-by: Emil Velikov <[email protected]> Reviewed-by: Jason Ekstrand <[email protected]>
* llvmpipe: implement support for cube map arraysRoland Scheidegger2014-08-055-4/+16
| | | | | | | | This just covers the resource side of things, not the actual sampling. Here things are trivial as cube map arrays are identical to 2d arrays in all respects. Reviewed-by: Brian Paul <[email protected]>
* svga: SVGA_3D_CMD_BIND_GB_SHADER needs to reserve two relocations.Matthew McClure2014-08-041-1/+1
| | | | | | | | | | | | With this patch, the SVGA_3D_CMD_BIND_GB_SHADER functionality will reserve two relocations, one for the shader ID and the second for the MOB ID. Verified with the WDDM winsys path that the number of relocations and patch locations required is two. Fixes Bug 1277406 Reviewed-by: Charmaine Lee <[email protected]>
* gallium: Move sRGB <-> RGB handling to libmesautilJason Ekstrand2014-08-043-2/+3
| | | | | Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util: Gather some common macrosJason Ekstrand2014-08-044-4/+2
| | | | | | | | | | This gathers macros that have been included across components into util so that the include chain can be more vertical. In particular, this makes util stand on its own without any dependence whatsoever on the rest of mesa. Signed-off-by: "Jason Ekstrand" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util: Move ralloc to a new src/util directory.Kenneth Graunke2014-08-042-1/+4
| | | | | | | | | | | | | | | | | | For a long time, we've wanted a place to put utility code which isn't directly tied to Mesa or Gallium internals. This patch creates a new src/util directory for exactly that purpose, and builds the contents as libmesautil.la. ralloc seemed like a good first candidate. These days, it's directly used by mesa/main, i965, i915, and r300g, so keeping it in src/glsl didn't make much sense. Signed-off-by: Kenneth Graunke <[email protected]> v2 (Jason Ekstrand): More realloc uses and some scons fixes Signed-off-by: Jason Ekstrand <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* llvmpipe: don't store number of layers per levelRoland Scheidegger2014-08-012-78/+50
| | | | | | | | | | | | | | | | This could be recalculated, though it turns out the only use of it after resource allocation is for calculating whole resource size (for scene size accounting though that isn't quite ideal neither). Thus, instead just store the whole resource size and drop it (saving a couple bytes of storage per resource). It makes things simpler too. Note that for the accounting winsys resources always come back with size 0 but this is unchanged (we don't actually know the size in any case). Also reformat llvmpipe_texture_layout (drop unneded indentation). v2: adapt to previous changes. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: integrate memory allocation into llvmpipe_texture_layoutRoland Scheidegger2014-08-011-45/+29
| | | | | | | | | | | | | | | Seems pointless to just duplicate some of the calculations (the calculation of actual memory used compared to what was predicted in llvmpipe_texture_layout actually could have differed slightly in some cases due to different alignment rules used though this should have been of no consequence). v2: keep the previous mip alignment of MAX2(64, cacheline). This was added for ARB_map_buffer_alignment - I'm not convinced it's needed for textures, but it was supposed to be cleanup without functional change. Also replace div with 64bit mul / comparison. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: get rid of impossible code in alloc_image_dataRoland Scheidegger2014-08-011-26/+13
| | | | | | | Only used for non display target resources. Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* r600g: Implement gpu_shader5 textureGatherGlenn Kennard2014-08-012-5/+36
| | | | | | | | | | | | | | | Adds 0-3 textureGather component selection and non-constant offsets Caveat: 0 and 1 texture swizzles only work if textureGather component select is 3 or a component that does not exist in the sampler texture format. This is a hardware limitation, any other value returns 128/255=0.501961 for both 0 and 1. Passes all textureGather piglit tests on radeon 6670, except for those using 0/1 texture swizzles due to aforementioned reason. Signed-off-by: Glenn Kennard <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffersMichel Dänzer2014-08-011-4/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g/radeonsi: Reduce or even drop special treatment of persistent mappingsMichel Dänzer2014-08-011-4/+8
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600g: gpu_shader5 gl_SampleMaskIn supportGlenn Kennard2014-07-312-7/+40
| | | | | | | | Map TGSI_SEMANTIC_SAMPLEMASK to register/component. Enable face register when sample mask is needed by shader. Requires Evergreen/Cayman Reviewed-by: Alex Deucher <[email protected]>
* r600g: Implement gpu_shader5 integer opsGlenn Kennard2014-07-311-0/+190
| | | | Reviewed-by: Alex Deucher <[email protected]>
* r600g: Add IMUL_HI/UMUL_HI supportGlenn Kennard2014-07-311-6/+6
| | | | | | | Fixes fs-imulExtended, fs-imulExtended-only-msb, fs-umulExtended, fs-umulExtended-only-msb piglit tests. Reviewed-by: Alex Deucher <[email protected]>
* r600g: Implement GL_ARB_texture_query_lodGlenn Kennard2014-07-312-2/+13
| | | | | | | | Requires Evergreen or later v2 (Andreas): Update relnotes/10.3 Reviewed-by: Alex Deucher <[email protected]> (v1)
* dri: Add a new capabilities for drivers that can't share buffersGiovanni Campagna2014-07-301-1/+1
| | | | | | | | | | | | | | | | | | | The kms-dri swrast driver cannot share buffers using the GEM, so it must tell the loader to disable extensions relying on that, without disabling the image DRI extension altogether (which would prevent the loader from working at all). This requires a new gallium capability (which is queried on the pipe_screen and for swrast drivers it's forwarded to the winsys), and requires a new version of the DRI image extension. [Emil Velikov] - Rebased on top of gallium-dri megadrivers. - Drop PIPE_CAP_BUFFER_SHARE and sw_winsys::get_param hook. The can_share_buffer cap is set at InitScreen. We use a different InitScreen (and thus value for the cap) function for kms_dri, due to deeper differences originating from dri megadrivers. Signed-off-by: Emil Velikov <[email protected]>
* svga: remove unneeded depth==1 assertion in svga_texture_view_surface()Brian Paul2014-07-291-1/+0
| | | | | | | We can create 3D texture views. Avoids an assertion in piglit fbo-generatemipmap-3d test and allows it to pass. Reviewed-by: Charmaine Lee <[email protected]>
* gallium/radeon: Add some Emacs .dir-locals.el filesMichel Dänzer2014-07-293-0/+33
| | | | | | Based on the toplevel one but adapted to the driver/winsys coding styles. Reviewed-by: Marek Olšák <[email protected]>
* ilo: fix fb height of HiZ opsChia-I Wu2014-07-291-1/+1
| | | | | It was set to aligned width. It appears to be fine on GEN7+, but causes random hangs on GEN6.
* r600g,radeonsi: switch all occurences of array_size to util_max_layerMarek Olšák2014-07-283-6/+10
| | | | | | | | | | | | | | | | | | This fixes 3D texture support in all these cases, because array_size is 1 with 3D textures and depth0 actually contains the "array size". util_max_layer is universal and returns the last layer index for any texture target. A lot of the cases below can't actually be hit with 3D textures, but let's be consistent. This fixes a failure in: piglit layered-rendering/clear-color-all-types 3d single_level for r600g and radeonsi, which was caused by an incorrect CMASK size calculation. Cc: [email protected] Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix occlusion queries on HawaiiMarek Olšák2014-07-281-1/+7
| | | | | | | This was just a guess - and it worked! Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* winsys/radeon: fix vram_size overflow with HawaiiMarek Olšák2014-07-281-1/+3
| | | | | | | This fixes piglit spec/!OpenGL 3.1/minmax. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: fix a hang with streamout on HawaiiMarek Olšák2014-07-282-1/+14
| | | | | | | | | | | I actually couldn't reproduce this one, but internal docs recommend this workaround. Better safe than sorry. Also, the number of dwords for the sync packets is increased by 4 instead of 2, because it wasn't bumped last time when a new packet was added there. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
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