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* vc4: Move uniforms handling to a separate file.Eric Anholt2015-07-143-314/+341
* vc4: Fix some -Wdouble-promotion warnings.Eric Anholt2015-07-143-6/+6
* vc4: Fix compiler warnings on release builds.Eric Anholt2015-07-144-7/+14
* vc4: Add better debug for register allocation failure.Eric Anholt2015-07-141-1/+5
* vc4: Drop reloc_count tracking for debug asserts on non-debug builds.Eric Anholt2015-07-141-0/+10
* vc4: Rework cl handling to be friendlier to the compiler.Eric Anholt2015-07-146-152/+203
* vc4: Make a helper function for getting the current offset in the CL.Eric Anholt2015-07-144-20/+21
* vc4: Drop separate cl*_reloc_hindex().Eric Anholt2015-07-141-18/+6
* vc4: Store reloc pointers as pointers, not offsets.Eric Anholt2015-07-141-5/+5
* vc4: Add perf debug for when we wait on BOs.Eric Anholt2015-07-144-43/+72
* radeonsi: directly include radeon/* headersEmil Velikov2015-07-131-1/+1
* radeonsi: direct emit intrinsic for DFRAC.Dave Airlie2015-07-131-0/+1
* radeonsi: ARB_gpu_shader_fp64 + ARB_vertex_attrib_64bit support.Dave Airlie2015-07-124-11/+171
* r600g: move sampler/ubo index registers before temp regDave Airlie2015-07-111-7/+6
* r600g: fix sampler/ubo indexing on caymanDave Airlie2015-07-112-6/+18
* nv50, nvc0: enable at least one color RT if alphatest is enabledIlia Mirkin2015-07-102-0/+36
* freedreno/a4xx: occlusion query supportRob Clark2015-07-101-1/+85
* freedreno: update generated headersRob Clark2015-07-1011-57/+116
* freedreno/ir3/sched: fixup new instr's blockRob Clark2015-07-101-0/+4
* freedreno/ir3/ra: fix failed assert for a0/p0Rob Clark2015-07-101-0/+5
* freedreno/ir3: shader-db tracesRob Clark2015-07-107-8/+67
* freedreno: fix crash in fd_invalidate_resource()Rob Clark2015-07-101-2/+2
* vc4: unref old fenceRob Clark2015-07-101-0/+2
* ilo: unref old fenceRob Clark2015-07-101-0/+2
* freedreno: unref old fenceRob Clark2015-07-101-1/+3
* nv50: avoid segfault with enabled but unbound vertex attribSamuel Pitoiset2015-07-081-0/+5
* nvc0: fix wrong use of BLIT_SRC_Y_INT for 2D texture copySamuel Pitoiset2015-07-081-1/+1
* android: freedreno: add missing components to the buildVarad Gautam2015-07-081-1/+4
* nvc0: turn sample counts off during blitIlia Mirkin2015-07-071-0/+7
* radeonsi: Use param export count from si_llvm_export_vs in si_shader_vsMichel Dänzer2015-07-073-22/+6
* radeonsi: don't flush an empty IB if the only thing we need is a fenceMarek Olšák2015-07-053-3/+15
* gallium/radeon: mark the gpu load thread stop trigger as volatileMarek Olšák2015-07-051-1/+1
* gallium: remove redundant pipe_context::fence_signalledMarek Olšák2015-07-0512-125/+0
* gallium: handle fence_finish timeout in various driversMarek Olšák2015-07-055-0/+15
* radeonsi: fix a hang with DrawTransformFeedback on 4 SE chipsMarek Olšák2015-07-051-0/+4
* nv50/ir: UCMP arguments are float, so make sure modifiers are appliedIlia Mirkin2015-07-031-1/+2
* r600g: disable single-sample fast color clear due to hangsMarek Olšák2015-07-031-1/+6
* r600g,radeonsi: implement get_device_reset_statusMarek Olšák2015-07-035-4/+30
* freedreno/ir3: don't be confused by eliminated indirectsRob Clark2015-07-032-0/+14
* freedreno/ir3: sched fixes for addr register usageRob Clark2015-07-031-12/+65
* freedreno/ir3: fix indirects trackingRob Clark2015-07-035-10/+23
* gallium/ttn: mark location specially in nir for color0-writes-allIlia Mirkin2015-07-032-0/+10
* nv50/ir: don't emit src2 in immediate formIlia Mirkin2015-07-021-2/+2
* nvc0: tune PREFER_BLIT_BASED_TEXTURE_TRANSFER capabilityAlexandre Courbot2015-07-011-1/+2
* nvc0: create screen fence objects with coherent attributeAlexandre Courbot2015-07-021-2/+6
* ilo: remove ilo_image_paramsChia-I Wu2015-07-011-75/+47
* ilo: add image_init_gen6_transfer_layout()Chia-I Wu2015-07-011-75/+37
* ilo: add image_set_gen6_bo_size()Chia-I Wu2015-07-013-118/+89
* ilo: add image_set_gen6_{hiz,mcs}Chia-I Wu2015-07-011-49/+61
* ilo: add image_get_gen6_monolithic_size()Chia-I Wu2015-07-011-67/+67
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