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* radeon/vcn: add decode message for mpeg2 codecLeo Liu2017-05-251-0/+66
* radeon/vcn: add decode message for vc1 codecLeo Liu2017-05-251-0/+72
* radeon/vcn: add decode message for hevc codecLeo Liu2017-05-251-0/+225
* radeon/vcn: add decode message decode for avc codecLeo Liu2017-05-251-4/+193
* radeon/vcn: add decode message feedbackLeo Liu2017-05-251-1/+5
* radeon/vcn: add decode message destroyLeo Liu2017-05-251-1/+10
* radeon/vcn: add decode message createLeo Liu2017-05-251-1/+21
* radeon/vcn: add common decode partLeo Liu2017-05-253-0/+675
* radeon/winsys: add vcn dec ring typeLeo Liu2017-05-251-0/+1
* radeon/winsys: add uvd enc ring typeLeo Liu2017-05-251-0/+1
* radeon/vcn: add vcn decode interfaceLeo Liu2017-05-252-0/+502
* svga: init svga_screen::swc_mutex with mtx_recursiveBrian Paul2017-05-242-1/+4
* svga: move logging initialization code into new functionBrian Paul2017-05-242-24/+31
* svga: init local vars to silence uninitialized use warningsBrian Paul2017-05-241-3/+3
* svga: log the process command line to the vmware.log fileBrian Paul2017-05-241-0/+16
* svga: Limit svga message capability to newer compilersSinclair Yeh2017-05-241-4/+14
* svga: Fix MSVC build.Brian Paul2017-05-241-2/+32
* svga: Add the ability to log messages to vmware.log on the host.Sinclair Yeh2017-05-245-0/+471
* gallium/radeon: pipe AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS into gallium HUDMarek Olšák2017-05-233-2/+8
* freedreno/ir3: switch to NIR by defaultRob Clark2017-05-232-16/+2
* freedreno/ir3: lower arrays to regsRob Clark2017-05-232-150/+185
* freedreno/ir3: add put_dst()Rob Clark2017-05-231-0/+24
* freedreno/ir3: code-motionRob Clark2017-05-231-55/+55
* freedreno/ir3: fix cmdline compilerRob Clark2017-05-231-2/+0
* freedreno/ir3: add missing nir_opt_copy_prop_vars() passRob Clark2017-05-231-0/+1
* freedreno/ir3: need different compiler options for a5xxRob Clark2017-05-234-5/+28
* freedreno/a5xx: remove copapasta from a4xxRob Clark2017-05-231-2/+1
* freedreno: only support SSBOs with nirRob Clark2017-05-231-0/+3
* freedreno/a5xx: add some missing texture formatsRob Clark2017-05-231-51/+51
* freedreno/a5xx: provoking vertexRob Clark2017-05-236-44/+40
* freedreno: update generated headersRob Clark2017-05-236-55/+64
* radeon: pass flags that can change shaders to disk_cache_create()Timothy Arceri2017-05-231-1/+2
* util/disk_cache: add new driver_flags param to cache keysTimothy Arceri2017-05-232-2/+2
* gallium/radeon: add a query for monitoring Gallium thread loadMarek Olšák2017-05-222-0/+13
* radeonsi/gfx9: compile shaders with +xnackMarek Olšák2017-05-221-6/+7
* vc4: Remove dead code in vc4_dump_surface_msaa()Rhys Kidd2017-05-221-6/+0
* nv50,nvc0: clear index buffer bufctx bin unconditionallyIlia Mirkin2017-05-202-5/+3
* nv50: fix vtxbuf cleanupIlia Mirkin2017-05-201-1/+1
* nvc0/ir: SHLADD's middle source must be an immediateIlia Mirkin2017-05-201-0/+2
* automake: add SWR LLVM gen_builder.hpp workaroundEmil Velikov2017-05-201-30/+11
* Android: r600: fix build when LLVM is disabledRob Herring2017-05-191-0/+4
* radeonsi/gfx9: use CE RAM optimallyMarek Olšák2017-05-182-36/+134
* radeonsi: remove CE offset alignment restrictionMarek Olšák2017-05-181-2/+1
* radeonsi: only upload (dump to L2) those descriptors that are used by shadersMarek Olšák2017-05-184-24/+117
* radeonsi: record which descriptor slots are used by shadersMarek Olšák2017-05-185-0/+41
* radeonsi: update si_ce_needed_cs_spaceMarek Olšák2017-05-181-8/+8
* radeonsi: do only 1 big CE dump at end of IBs and one reload in the preambleMarek Olšák2017-05-185-37/+37
* radeonsi: remove early return in si_upload_descriptorsMarek Olšák2017-05-181-3/+0
* radeonsi: clamp indirect index to the number of declared shader resourcesMarek Olšák2017-05-184-4/+15
* radeonsi: merge sampler and image descriptor lists into oneMarek Olšák2017-05-186-112/+99
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