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* gk110/ir: fix double-wide vm addressIlia Mirkin2016-01-201-0/+4
* gk110/ir: add OP_CCTL handlingIlia Mirkin2016-01-201-0/+35
* gk110/ir: add atomic op emission, fix gmem loadsIlia Mirkin2016-01-201-5/+65
* llvmpipe: warn about illegal use of objects in different contextsRoland Scheidegger2016-01-213-1/+32
* llvmpipe,i915: add back NEW_RASTERIZER dependency when computing vertex infoRoland Scheidegger2016-01-212-3/+5
* nv50/ir: don't flip SHL(ADD) into ADD(SHL) if ADD sources have modifiersIlia Mirkin2016-01-201-0/+2
* gk110/ir: fix load from shared memoryIlia Mirkin2016-01-201-1/+1
* gk110/ir: add partial BAR supportIlia Mirkin2016-01-201-2/+18
* llvmpipe: turn depth clears into full depth/stencil clears for d24x8 formatsRoland Scheidegger2016-01-201-11/+14
* nv50/ir: swap the least-ref'd source into src1 when both const/immIlia Mirkin2016-01-181-10/+15
* freedreno/a4xx: use smaller threadsize for more registersRob Clark2016-01-181-2/+5
* freedreno: per-generation OUT_IB packetRob Clark2016-01-189-6/+43
* gallium/radeon: Rename do_invalidate_resource to invalidate_bufferMichel Dänzer2016-01-181-4/+6
* radeonsi: Avoid warning about LLVM generating R_0286D0_SPI_PS_INPUT_ADDRMichel Dänzer2016-01-181-0/+3
* radeonsi: Print "LLVM emitted unknown config register" warning only onceMichel Dänzer2016-01-181-2/+9
* gm107/ir: don't do indirect frag shader inputs on GM107Ilia Mirkin2016-01-171-0/+1
* nvc0: bsp_bo can't be nullIlia Mirkin2016-01-171-1/+1
* llvmpipe: fix arguments order given to vec_andcOded Gabbay2016-01-171-1/+1
* freedreno/ir3: fix mad 3rd src delay calcRob Clark2016-01-171-1/+1
* freedreno/ir3: better array register allocationRob Clark2016-01-162-9/+51
* freedreno/ir3: array offset can be negativeRob Clark2016-01-165-12/+13
* freedreno/ir3: workaround bug/featureRob Clark2016-01-161-0/+9
* freedreno/ir3: array reworkRob Clark2016-01-169-363/+365
* freedreno/ir3: refactor/simplify cpRob Clark2016-01-161-87/+82
* freedreno/ir3: fix incorrect decoding of mov instructionsRob Clark2016-01-161-1/+1
* freedreno/ir3: remove unused tgsi tokens ptrRob Clark2016-01-161-1/+0
* freedreno/ir3: bit of ra refactorRob Clark2016-01-161-25/+20
* freedreno/ir3: cosmetic de-indentRob Clark2016-01-161-36/+34
* nv50/ir: add saturate support on ex2Ilia Mirkin2016-01-162-0/+6
* llvmpipe: ditch additional ref counting for vertex/geometry sampler viewsRoland Scheidegger2016-01-154-46/+12
* llvmpipe: fix "leaking" texturesRoland Scheidegger2016-01-152-2/+9
* nv50/ir: rebase indirect temp arrays to 0, so that we use less lmem spaceIlia Mirkin2016-01-141-14/+44
* nv50/ir: only use FILE_LOCAL_MEMORY for temp arrays that use indirectionIlia Mirkin2016-01-141-15/+50
* nvc0/ir: be careful about propagating very large offsets into const loadIlia Mirkin2016-01-144-1/+19
* nvc0: allow fragment shader inputs to use indirect indexingIlia Mirkin2016-01-141-1/+1
* radeonsi: don't miss changes to SPI_TMPRING_SIZEMarek Olšák2016-01-141-2/+7
* svga: add DXGenMips command supportCharmaine Lee2016-01-1410-26/+144
* svga: add num-generate-mipmap HUD queryCharmaine Lee2016-01-143-1/+12
* gallium/st: add pipe_context::generate_mipmap()Charmaine Lee2016-01-1415-0/+51
* gallium/radeon: do not reallocate user memory buffersNicolai Hähnle2016-01-142-8/+31
* gallium/radeon: implement PIPE_CAP_INVALIDATE_BUFFERNicolai Hähnle2016-01-145-9/+22
* gallium/radeon: reset valid_buffer_range on PIPE_TRANSFER_DISCARD_WHOLE_RESOURCENicolai Hähnle2016-01-141-0/+3
* gallium: add PIPE_CAP_INVALIDATE_BUFFERNicolai Hähnle2016-01-1414-0/+14
* radeonsi: move POSITION and FACE fragment shader inputs to system valuesMarek Olšák2016-01-133-45/+25
* radeonsi: simplify gl_FragCoord behaviorMarek Olšák2016-01-131-23/+22
* llvmpipe: (trivial) use cast wrapper for __m128d to __m128 castsRoland Scheidegger2016-01-131-2/+2
* llvmpipe: avoid most 64 bit math in rasterizationRoland Scheidegger2016-01-132-65/+143
* llvmpipe: scale up bounding box planes to subpixel precisionRoland Scheidegger2016-01-133-30/+30
* llvmpipe: add sse code for fixed position calculationRoland Scheidegger2016-01-131-8/+50
* nvc0: do not force re-binding of compute constbufs on FermiSamuel Pitoiset2016-01-121-1/+1
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