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* r600/shader: add function to get tess constants infoDave Airlie2015-12-071-1/+90
* r600/shader: add utility functions to do single slot arithmaticDave Airlie2015-12-071-0/+95
* r600/eg: workaround bug with tess shader and dynamic GPRs.Dave Airlie2015-12-075-61/+190
* r600/shader: move get_temp and last_instruction helpers upDave Airlie2015-12-071-19/+17
* r600: bind geometry shader ring to the correct placeDave Airlie2015-12-071-2/+9
* r600: create fixed function tess control shader fallback.Dave Airlie2015-12-073-1/+46
* r600: create LDS info constants buffer and write LDS registers. (v2)Dave Airlie2015-12-073-3/+188
* r600/eg: update shader stage emission/tf param for tess.Dave Airlie2015-12-071-5/+69
* r600: hook TES/TCS shaders to the selection logic.Dave Airlie2015-12-071-2/+32
* r600: workout bitmask for the used tcs inputs/outputs.Dave Airlie2015-12-072-0/+28
* r600: port over the get_lds_unique_index from radeonsiDave Airlie2015-12-072-0/+39
* r600: add set_tess_state callback.Dave Airlie2015-12-072-1/+12
* r600/eg: init tess registers to defaults (v1.1)Dave Airlie2015-12-071-10/+31
* r600: hook up constants/samplers/sampler view for tessellationDave Airlie2015-12-072-10/+82
* r600: add create/bind/delete shader hooks for tessellationDave Airlie2015-12-071-0/+59
* r600/sb: add LS/HS hw shader types.Dave Airlie2015-12-073-3/+9
* r600/blit: add tcs/tes shader saves.Dave Airlie2015-12-071-0/+2
* r600: disable SB for now on tess related shaders.Dave Airlie2015-12-071-0/+7
* r600: update correct hw shaders depending on configuration.Dave Airlie2015-12-071-1/+12
* r600: add shader key entries for tcs and tes.Dave Airlie2015-12-075-3/+49
* r600: add PATCHES to the pipe conversion.Dave Airlie2015-12-071-0/+1
* r600: add functions to update ls/hs state.Dave Airlie2015-12-072-0/+27
* r600g/sb: Support LDS ops in SB bytecode I/OGlenn Kennard2015-12-074-9/+105
* r600: add support for LDS instruction encoding.Dave Airlie2015-12-074-2/+144
* r600/sb: add support for GDS to the sb decoder/dump. (v1.1)Dave Airlie2015-12-074-10/+93
* r600: add support for GDS clause to the assembler.Dave Airlie2015-12-074-1/+148
* r600: use macros for updating the various stages.Dave Airlie2015-12-071-15/+25
* r600: add SET_NULL_SHADER macro.Dave Airlie2015-12-071-2/+7
* r600: move clip misc and streamout stream updates to a single placeDave Airlie2015-12-071-6/+11
* r600: move selecting shaders into earlier code.Dave Airlie2015-12-071-5/+4
* r600: use a macro to remove common shader selection code.Dave Airlie2015-12-071-12/+9
* r600: move to using hw stages array for hw stage atomsDave Airlie2015-12-075-32/+24
* r600: make adjust_gprs use hw stages.Dave Airlie2015-12-072-55/+64
* r600: introduce HW shader stage definesDave Airlie2015-12-071-0/+11
* r600: fix masks for two of the unused evergreen regs.Dave Airlie2015-12-071-2/+2
* gallium/drivers: Sanitize NULL checks into canonical formEdward O'Callaghan2015-12-0654-132/+132
* gallium/drivers: Trivial code-style cleanupEdward O'Callaghan2015-12-0616-58/+58
* svga: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-062-2/+2
* llvmpipe: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-062-4/+4
* gallium/drivers/nouveau: Make use of ARRAY_SIZE macroEdward O'Callaghan2015-12-0614-22/+20
* gallium/radeon*: Remove useless castsEdward O'Callaghan2015-12-065-14/+11
* nv50/ir: fold shl + mul with immediatesIlia Mirkin2015-12-051-0/+16
* nv50/ir: propagate indirect loads into instructionsIlia Mirkin2015-12-051-0/+52
* nv50/ir: flip shl(add, imm) into add(shl, imm)Ilia Mirkin2015-12-051-4/+34
* vc4: Fix accidental scissoring when scissor is disabled.Eric Anholt2015-12-051-5/+23
* vc4: Disable RCL blitting when scissors are enabled.Eric Anholt2015-12-051-0/+3
* vc4: Bring over cleanups from submitting to the kernel.Eric Anholt2015-12-054-87/+78
* nvc0: expose a group of performance metrics for SM30 (Kepler)Samuel Pitoiset2015-12-052-2/+8
* nvc0: re-introduce performance metrics for SM30 (Kepler)Samuel Pitoiset2015-12-052-5/+188
* nvc0: remove useless counting operations for MP countersSamuel Pitoiset2015-12-051-101/+5
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