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* freedreno/ir3: add ir3 builder helpersRob Clark2015-04-053-4/+162
* freedreno/ir3: fix sam argument order commentRob Clark2015-04-051-1/+1
* xa: support for drivers which use NIRRob Clark2015-04-051-0/+4
* nv50: allocate more offset space for occlusion queriesIlia Mirkin2015-04-041-5/+5
* nv50/ir: avoid folding immediates into imad operationsIlia Mirkin2015-04-021-1/+2
* nv50/ir: fix imad emission when dst == src2Ilia Mirkin2015-04-021-1/+1
* vc4: Add support for nir_iabs.Eric Anholt2015-04-021-0/+5
* freedreno/a3xx: add MRT supportIlia Mirkin2015-04-028-138/+219
* freedreno: convert blit program to array for each number of rtsIlia Mirkin2015-04-0212-21/+45
* freedreno: add support for laying out MRTs in gmemIlia Mirkin2015-04-022-16/+43
* freedreno: add core infrastructure support for MRTsIlia Mirkin2015-04-024-8/+14
* freedreno/ir3: add support for FS_COLOR0_WRITES_ALL_CBUFS propertyIlia Mirkin2015-04-022-1/+10
* freedreno/a3xx: add independent blend function supportIlia Mirkin2015-04-022-8/+9
* freedreno: remove alpha key from ir3_shaderIlia Mirkin2015-04-029-42/+8
* i915g: Implement EGL_EXT_image_dma_buf_importStéphane Marchesin2015-04-012-1/+2
* vc4: Add shader-db dumping of NIR instruction count.Eric Anholt2015-04-011-0/+29
* vc4: Convert to consuming NIR.Eric Anholt2015-04-015-720/+707
* vc4: Tell shader-db how big our UBOs are, if present.Eric Anholt2015-04-011-0/+6
* nouveau: synchronize "scratch runout" destruction with the command streamMarcin Ślusarz2015-03-312-19/+37
* radeonsi/compute: Default to the same PIPE_SHADER_CAP values as other shader ...Tom Stellard2015-03-311-1/+5
* radeon/vce: implement video usability information supportLeo Liu2015-03-313-0/+59
* llvmpipe: enable ARB_texture_gatherRoland Scheidegger2015-03-311-2/+3
* gallivm: simplify sampler interfaceRoland Scheidegger2015-03-311-26/+7
* vc4: Drop integer multiplies with 0 to moves of 0.Eric Anholt2015-03-301-0/+8
* vc4: Add a constant folding pass.Eric Anholt2015-03-304-0/+113
* vc4: Don't bother masking out the low 24 bits for integer multipliesEric Anholt2015-03-301-12/+8
* vc4: Make integer multiply use 24 bits for the low parts.Eric Anholt2015-03-301-5/+5
* radeonsi: Cache LLVMTargetMachineRef in context instead of in screenMichel Dänzer2015-03-306-30/+41
* freedreno/a3xx: add support for point sprite coordinate replacementIlia Mirkin2015-03-284-30/+28
* freedreno/a3xx: make vs-set point size workIlia Mirkin2015-03-283-2/+10
* freedreno/a3xx: point size should not be divided by 2Ilia Mirkin2015-03-282-5/+5
* freedreno/a3xx: fix 3d texture layoutIlia Mirkin2015-03-282-7/+16
* freedreno/a3xx: LAYERSZ2 appears to have no effect on arraysIlia Mirkin2015-03-281-2/+1
* llvmpipe: simplify address calculation for 4x4 blocksRoland Scheidegger2015-03-284-76/+35
* nv50/ir/gk110: fix offset flag position for TXD opcodeIlia Mirkin2015-03-271-0/+1
* nv50/ir: take postFactor into account when doing peephole optimizationsIlia Mirkin2015-03-271-4/+8
* gallivm: pass jit_context pointer through to samplingRoland Scheidegger2015-03-273-18/+19
* gallium/util: remove u_linkageIlia Mirkin2015-03-262-2/+0
* vc4: Add a dump-the-surface-contents routine.Eric Anholt2015-03-242-0/+101
* vc4: Fix pitch alignment of linear textures.Eric Anholt2015-03-241-1/+1
* vc4: Write the alignment of level width consistently in validation.Eric Anholt2015-03-241-2/+2
* vc4: Fix use of a bool as an enum.Eric Anholt2015-03-241-1/+1
* vc4: Decide the HW's format before laying out the miptree.Eric Anholt2015-03-241-3/+3
* vc4: Use our device-specific ioctls for create/mmap.Eric Anholt2015-03-241-15/+36
* vc4: Make a new #define for making code conditional on the simulator.Eric Anholt2015-03-243-15/+25
* vc4: Add some useful debug printfs for miptrees.Eric Anholt2015-03-241-0/+37
* Revert "nv50,nvc0: remove bogus 64_FLOAT formats"Ilia Mirkin2015-03-231-0/+5
* gallium: implement get_device_vendor() for existing driversGiuseppe Bilotta2015-03-2313-0/+83
* galahad: actually remove the driverEmil Velikov2015-03-2110-1998/+0
* llvmpipe: use global llvm context for PIPE_SUBSYSTEM_EMBEDDEDRoland Scheidegger2015-03-211-0/+11