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* radeonsi: use r600_common_context less pt7Marek Olšák2018-04-057-25/+22
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt6Marek Olšák2018-04-054-92/+91
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: update copyrightsMarek Olšák2018-04-0546-1/+56
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: switch radeon_add_to_buffer_list parameter to si_contextMarek Olšák2018-04-0514-45/+45
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt5Marek Olšák2018-04-058-242/+237
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt4Marek Olšák2018-04-059-136/+136
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt3Marek Olšák2018-04-055-54/+54
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt2Marek Olšák2018-04-0510-46/+49
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use r600_common_context less pt1Marek Olšák2018-04-059-87/+88
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: don't use r600_common_context in si_emit_cache_flushMarek Olšák2018-04-051-54/+54
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: switch r600_atom::emit parameter to si_contextMarek Olšák2018-04-057-24/+19
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: flatten / remove struct r600_ringMarek Olšák2018-04-0524-179/+175
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_ring::flush callbackMarek Olšák2018-04-054-7/+3
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: make radeon_add_to_buffer_list_check_mem be gfx-onlyMarek Olšák2018-04-053-39/+36
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: add_to_buffer_list functions can return voidMarek Olšák2018-04-051-9/+9
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move saved_cs functions from r600_pipe_common.c to si_debug.cMarek Olšák2018-04-054-54/+54
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move DMA CS functions from r600_pipe_common.c to si_dma_cs.cMarek Olšák2018-04-055-130/+157
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move EOP event code from r600_pipe_common.c to si_fence.cMarek Olšák2018-04-054-129/+129
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_hw_context.c -> si_gfx_cs.cMarek Olšák2018-04-053-2/+2
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: move si_destroy_saved_cs to si_debug.cMarek Olšák2018-04-053-8/+8
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_begin_new_cs -> si_begin_new_gfx_csMarek Olšák2018-04-053-6/+6
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: rename si_need_cs_space -> si_need_gfx_cs_spaceMarek Olšák2018-04-056-8/+8
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::blit_decompress_depthMarek Olšák2018-04-054-20/+18
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::decompress_dccMarek Olšák2018-04-056-11/+7
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::invalidate_bufferMarek Olšák2018-04-053-25/+11
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::rebind_bufferMarek Olšák2018-04-054-12/+8
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_common_context::set_occlusion_query_stateMarek Olšák2018-04-054-11/+5
| | | | | | and remove unused old_enable parameter. Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::save_qbo_stateMarek Olšák2018-04-055-6/+4
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove unused query codeMarek Olšák2018-04-054-77/+2
| | | | | | The get_size perf counter callback is also inlined and removed. Acked-by: Timothy Arceri <[email protected]>
* radeonsi: use num_cs_dw_queries_suspendMarek Olšák2018-04-051-2/+6
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::need_gfx_cs_spaceMarek Olšák2018-04-053-17/+4
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::set_atom_dirtyMarek Olšák2018-04-053-5/+1
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: remove r600_pipe_common::check_vm_faultsMarek Olšák2018-04-053-9/+2
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: call CS flush functions directly whenever possibleMarek Olšák2018-04-058-24/+24
| | | | Acked-by: Timothy Arceri <[email protected]>
* radeonsi: skip DCC render feedback checking if color writes are disabledMarek Olšák2018-04-053-5/+23
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* radeonsi/gfx9: fix bad LLVM params in monolithic LS+HSMarek Olšák2018-04-031-1/+5
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* nir+drivers: add helpers to get # of src/dest componentsRob Clark2018-04-031-5/+1
| | | | | | | | | Add helpers to get the number of src/dest components for an intrinsic, and update spots that were open-coding this logic to use the helpers instead. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Eric Anholt <[email protected]>
* freedreno/ir3: fix fallout of unused false-depth eliminationRob Clark2018-04-032-17/+19
| | | | | | | | | | Since we were MARK flag for both preventing loops, and tracking whether instructions were used, we could end up in an infinite loop due to bd2ca2bcdd. Instead invert the logic.. mark all instructions UNUSED up front and clear the flag as we visit them. Fixes: bd2ca2bcdd freedreno/ir3: eliminate unused false-deps Signed-off-by: Rob Clark <[email protected]>
* radeonsi: Fix include for LLVMAddPromoteMemoryToRegisterPassMike Lothian2018-04-021-0/+3
| | | | | | | | | Include llvm-c/Transforms/Utils.h with the newest LLVM 7 Signed-of-by: Mike Lothian <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Tested-by: Dieter Nützel <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* radeonsi: implement GL_KHR_blend_equation_advancedMarek Olšák2018-04-0212-17/+203
| | | | | | | MSAA is supported using sample shading. Layered rendering and all texture targets are also supported. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: rename unpack_param -> si_unpack_paramMarek Olšák2018-04-022-27/+31
| | | | Tested-by: Dieter Nützel <[email protected]>
* radeonsi: move FMASK shader logic to shared codeMarek Olšák2018-04-021-72/+2
| | | | | | We'll need it for FBFETCH in both TGSI and NIR paths. Tested-by: Dieter Nützel <[email protected]>
* radeonsi: add R600_DEBUG=nofmask to disable MSAA compressionMarek Olšák2018-04-025-14/+17
| | | | | | For testing. Tested-by: Dieter Nützel <[email protected]>
* ac/gpu_info: rename has_virtual_memory -> r600_has_virtual_memoryMarek Olšák2018-04-023-6/+6
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* radeonsi/nir: fix explicit component packing for geom/tess doublesTimothy Arceri2018-04-021-8/+11
| | | | Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: gather buffers declared more accurately and use const fast pathTimothy Arceri2018-04-022-6/+90
| | | | | | | | For now we skip SI && HAVE_LLVM < 0x0600 for simplicity. We also skip setting the more accurate masks for builtin uniforms for now as it causes some piglit regressions. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: create load_const_buffer_desc_fast_path() helperTimothy Arceri2018-04-021-39/+49
| | | | | | | | This will be shared by the TGSI and NIR backends. For simplicity we leave the SI LLVM 5.0 and lower work around only in the TGSI backend. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi/nir: set TGSI_PROPERTY_NEXT_SHADERTimothy Arceri2018-04-021-0/+3
| | | | Reviewed-by: Marek Olšák <[email protected]>
* freedreno/a5xx: don't align height for PIPE_BUFFERRob Clark2018-04-011-1/+1
| | | | | | | | | Buffers can be large, so we probably don't want to make them all 32x bigger. But they can't be rendered to (at least in GL) so we don't need this workaround to prevent page faults on mem<->gmem. Cc: "18.0" <[email protected]> Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: fix page faults on last levelRob Clark2018-04-011-0/+10
| | | | | | | | | | We could alternatively fall back to using "old style" draw's for mem<->gmem (ie. what <= a4xx do) when height is not aligned to 32, but that is somewhat more work (and not really something that could be applied to stable) Cc: "18.0" <[email protected]> Signed-off-by: Rob Clark <[email protected]>
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