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* radeon/vcn: add encode end frameBoyuan Zhang2017-11-171-1/+2
* radeon/vcn: add encode bitstreamBoyuan Zhang2017-11-171-1/+13
* radeon/vcn: add encode begin frameBoyuan Zhang2017-11-171-1/+22
* radeon/vcn: add encode header implementationsBoyuan Zhang2017-11-172-0/+241
* radeon/vcn: add encode header algorithmsBoyuan Zhang2017-11-172-0/+127
* radeon/vcn: add ib implementationsBoyuan Zhang2017-11-171-24/+268
* radeon/vcn: add common encode partBoyuan Zhang2017-11-175-0/+489
* radeon/winsys: add vcn enc ring typeBoyuan Zhang2017-11-171-0/+1
* radeon/vcn: add vcn encode interfaceBoyuan Zhang2017-11-171-0/+325
* freedreno/a5xx: stencil texturing supportRob Clark2017-11-173-10/+34
* freedreno/a5xx/gmem: fix z32/s8 restore/resolveRob Clark2017-11-171-5/+13
* freedreno/a5xx/gmem: move ZS restore tiling hackRob Clark2017-11-171-20/+22
* freedreno: update generated headersRob Clark2017-11-176-13/+13
* svga: add missing PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* casesBrian Paul2017-11-161-0/+2
* r600: enable ARB_shader_image_load_store, ARB_shader_image_sizeDave Airlie2017-11-171-3/+9
* r600: handle image size support.Dave Airlie2017-11-173-9/+101
* r600/sb: disable SB for images.Dave Airlie2017-11-171-0/+1
* r600/shader: add support for load/store/atomic ops on images.Dave Airlie2017-11-171-4/+315
* r600: add core pieces of image support.Dave Airlie2017-11-176-3/+428
* r600/shader: implement getting thread id.Dave Airlie2017-11-171-0/+74
* r600/shader: add flag to denote if shader uses imagesDave Airlie2017-11-172-0/+2
* r600: implement basic memory barrier.Dave Airlie2017-11-172-5/+24
* r600: allocate immed buffer resource for images.Dave Airlie2017-11-173-0/+21
* r600: handle writes_memory properlyDave Airlie2017-11-172-3/+13
* freedreno: also mark images used by draw/gridRob Clark2017-11-161-0/+18
* freedreno: mark SSBOs written at draw timeRob Clark2017-11-161-1/+1
* freedreno/a5xx: ARB_framebuffer_no_attachments supportRob Clark2017-11-163-1/+11
* radeonsi: copy some nir gs infoTimothy Arceri2017-11-161-0/+7
* ac: add gs_{prim,invocation}_id to the abiTimothy Arceri2017-11-162-10/+6
* radeonsi: gather stream info in nir pathTimothy Arceri2017-11-161-0/+37
* svga: s/unsigned/enum tgsi_texture_type/Brian Paul2017-11-151-5/+5
* svga: issue debug warning for unsupported two-sided stencil stateBrian Paul2017-11-151-0/+15
* etnaviv: Add sampler TS supportWladimir J. van der Laan2017-11-153-6/+99
* etnaviv: Flush TS cache before changing TS configurationWladimir J. van der Laan2017-11-151-0/+5
* etnaviv: Add TS_SAMPLER formats to etnaviv_formatWladimir J. van der Laan2017-11-152-74/+91
* etnaviv: Check that resource has a valid TS in etna_resource_needs_flushWladimir J. van der Laan2017-11-152-1/+18
* etnaviv: rnndb updateWladimir J. van der Laan2017-11-156-9/+20
* r600: set the number type correctly for float rts in cb setupRoland Scheidegger2017-11-152-2/+15
* r600: use ieee version of rsqRoland Scheidegger2017-11-151-5/+1
* r600: use ieee version of rcpRoland Scheidegger2017-11-151-6/+2
* r600: use DX10_CLAMP bit in shader setupRoland Scheidegger2017-11-152-0/+15
* r600: use min_dx10/max_dx10 instead of min/maxRoland Scheidegger2017-11-152-6/+9
* r600: fix cubemap arraysDave Airlie2017-11-151-9/+17
* freedreno/a5xx: small comment fixRob Clark2017-11-141-1/+1
* freedreno/a5xx: indirect draw supportRob Clark2017-11-142-1/+37
* freedreno/a5xx: split out helper for pipeline stallsRob Clark2017-11-142-6/+13
* freedreno: update generated headersRob Clark2017-11-146-16/+135
* gallium/radeon: disable the cache when nir backend enabledTimothy Arceri2017-11-151-0/+4
* broadcom/vc4: fix indentation in vc4_screen.cAndres Rodriguez2017-11-141-8/+8
* swr/rast: Faster emulated simd16 permuteTim Rowley2017-11-141-23/+11
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