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* radeonsi: Handle additional PIPE_COMPUTE_CAP_*Niels Ole Salscheider2013-08-231-1/+14
| | | | | | | | | | | This patch adds support for: PIPE_COMPUTE_CAP_MAX_INPUT_SIZE PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE Return the values reported by the closed source driver for now. Signed-off-by: Niels Ole Salscheider <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: copy r600_get_timestampNiels Ole Salscheider2013-08-231-0/+9
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Implement PIPE_QUERY_TIMESTAMPNiels Ole Salscheider2013-08-234-2/+46
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Fix y/z/w component values of TGSI_SEMANTIC_FOG pixel shader inputsMichel Dänzer2013-08-221-0/+18
| | | | | | | | | They are defined as constant 0.0/0.0/1.0. Three more little piglits. Cc: [email protected] Reviewed-by: Alex Deucher <[email protected]>
* trace: Handle null tokens.José Fonseca2013-08-221-2/+6
| | | | Used for example on stream out without geometry shader.
* ilo: do not need last shader stage for 3DSTATE_SBEChia-I Wu2013-08-224-14/+6
| | | | | | We have set up 3DSTATE_SBE (or 3DSTATE_SF on GEN6) in ilo_shader_select_kernel_routing(). There is no need to pass the last shader stage to the GPE function.
* ilo: fix a potential issue with STATE_SIPChia-I Wu2013-08-221-2/+2
| | | | | Command length is ORed to the wrong place. Since the ORed value is zero, there is no real change.
* ilo: add GEN check to 3DSTATE_CLIPChia-I Wu2013-08-221-0/+2
| | | | Assert that gen6_emit_3DSTATE_CLIP is for GEN 6 and 7.
* svga: minor clean-ups in emit_hw_vs_vdecl()Brian Paul2013-08-211-6/+6
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* gallivm: implement better control of per-quad/per-element/scalar lodRoland Scheidegger2013-08-201-4/+4
| | | | | | | | | | | | | | | | There's a new debug value used to disable per-quad lod optimizations in fragment shader (ignored for vs/gs as the results are just too wrong typically). Also trying to detect if a supplied lod value is really a scalar (if it's coming from immediate or constant file) in which case sampler code can use this to stay on per-quad-lod path (in fact for explicit lod could simplify even further and use same lod for both quads in the avx case but this is not implemented yet). Still need to actually implement per-element lod bias (and derivatives), and need to handle per-element lod in size queries. v2: fix comments, prettify. Reviewed-by: Jose Fonseca <[email protected]>
* radeonsi: Always pre-load separate VGPRs for centroid vs. center interpolationMichel Dänzer2013-08-201-1/+2
| | | | | | | | | | | | | The LLVM R600 backend currently always uses separate VGPRs for these. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=68162 (Centroid interpolation is identical to center interpolation without multisampling, so the shader hardware was only pre-loading one set of interpolation coefficients, and the pixel shader code was using uninitialized values as the centroid interpolation coefficients) Cc: [email protected] Tested-by: Laurent Carlier <[email protected]>
* radeonsi: Fix SPI_BARYC_CNTL register initializationMichel Dänzer2013-08-201-22/+3
| | | | | | | The centroid / center interpolation related bits have different meanings as of SI. Fixes 7 centroid interpolation related piglit tests.
* ilo: add ILO_DEBUG=flushChia-I Wu2013-08-2010-12/+29
| | | | | | | | When specified, ilo will print a line similar to cp flushed for render with 949+888 DWords (22.4%) because of frame end for every ilo_cp_flush() call.
* ilo: add ILO_DEBUG=drawChia-I Wu2013-08-205-2/+83
| | | | It can print out pipe_draw_info and the dirty bits set, useful for debugging.
* r600g/sb: Move memsets of member structs to within constructor bodies.Vinson Lee2013-08-192-6/+3
| | | | | | | Silences "Uninitialized pointer field" defects reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Vadim Girlin <[email protected]>
* radeonsi: Ensure fmask_format is initialized in release builds.Vinson Lee2013-08-191-0/+1
| | | | | | | Fixes "Uninitialized scalar variable" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* vl: add entrypoint to is_video_format_supportedChristian König2013-08-197-10/+17
| | | | Signed-off-by: Christian König <[email protected]>
* vl: add entrypoint to get_video_paramChristian König2013-08-1914-7/+21
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename pipe_video_decoder to pipe_video_codecChristian König2013-08-1923-81/+81
| | | | Signed-off-by: Christian König <[email protected]>
* vl: rename enum pipe_video_codec to pipe_video_formatChristian König2013-08-1916-89/+89
| | | | Signed-off-by: Christian König <[email protected]>
* vl: use a template for create_video_decoderChristian König2013-08-1913-186/+83
| | | | Signed-off-by: Christian König <[email protected]>
* nv50: allow non-nv12 buffers to be created, just pass them through to vlIlia Mirkin2013-08-171-5/+1
| | | | | | | | | | Since we expose non-NV12 formats as supported when there is no decoer profile selected, make sure that those formats are actually allowed to be allocated. Signed-off-by: Ilia Mirkin <[email protected]> Tested-by: Emil Velikov <[email protected]> Cc: "9.2" <[email protected]>
* radeonsi: fix feature support reportingMarek Olšák2013-08-171-0/+1
| | | | broken by 21d9a1b5ef51ce449e9a82641d0d605c5448b41c
* radeonsi: require LLVM 3.4 for MSAAMarek Olšák2013-08-172-2/+3
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* radeonsi: don't make scanout resources linear except for cursorsMarek Olšák2013-08-171-1/+1
| | | | | | | | | The surface allocator understands the scanout flag just fine. This seems to improve performance for Ubuntu Unity on top of st/xorg and it fixes the cursor. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove useless code from tex_fetch_argsMarek Olšák2013-08-171-18/+0
| | | | | | The array slice has already been added to "address". Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable unbound colorbuffersMarek Olšák2013-08-171-2/+7
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: port texture improvements from r600gMarek Olšák2013-08-178-268/+367
| | | | | | | | | | | | | | This started as an attempt to add support for MSAA texture transfers and MSAA depth-stencil decompression for the DB->CB copy path. It has gotten a bit out of control, but it's for the greater good. Some changes do not make much sense, they are there just to make it look like the other driver. With a few cosmetic modifications, r600_texture.c can be shared with a symlink. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement texture fetching for compressed MSAA textures (v2)Marek Olšák2013-08-171-5/+116
| | | | | | v2: use resource slots 16..31 for FMASK textures Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add FMASK texture binding slots and resource setup (v2)Marek Olšák2013-08-176-3/+67
| | | | | | v2: bind FMASK textures to shader resource slots 16..31 Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement FMASK decompression for MSAA texturingMarek Olšák2013-08-175-17/+142
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: scanout buffers cannot be a destination of MSAA resolveMarek Olšák2013-08-171-1/+3
| | | | | | Resolving to scanout buffers just doesn't work. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement MSAA colorbuffer compression for renderingMarek Olšák2013-08-179-2/+208
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement uncompressed MSAA texturingMarek Olšák2013-08-172-7/+13
| | | | | | | This is glBlitFramebuffer support for MSAA surfaces as required by GL 3.0 and texturing as required by GL 3.2 and GL_ARB_texture_multisample. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: disable alpha-to-coverage for integer colorbuffersMarek Olšák2013-08-172-1/+9
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement GL_SAMPLE_ALPHA_TO_ONEMarek Olšák2013-08-175-1/+30
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement uncompressed MSAA rendering and color resolvingMarek Olšák2013-08-179-23/+423
| | | | | | | This is basic MSAA support which should work with most apps. Some features are missing, those will be implemented by other commits. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: add flexible shader descriptor management and use it for sampler viewsMarek Olšák2013-08-1710-56/+535
| | | | | | | | | | | | | | | | | | | | | | | It moves all sampler view descriptors to a buffer. It supports partial resource updates and it can also unbind resources (required for FMASK texturing). The buffer contains all sampler view descriptors for one shader stage, represented as an array. On top of that, there are N arrays in the buffer, which are used to emulate context registers as implemented by the previous ASICs (each array is a context). This uses the RCU synchronization approach to avoid read-after-write hazards as discussed in the thread: "radeonsi: add FMASK texture binding slots and resource setup" CP DMA is used to clear the descriptors at context initialization and to copy the descriptors from one context to the next. v2: - use PKT3_DMA_DATA on CIK (I'll test CIK later) - turn the bool CP DMA parameters into self-explanatory flags - add a nice simple API for packet emission to radeon_winsys.h - use 256 contexts, 128 causes texture corruption in openarena
* radeonsi/compute: Let the state tracker do all the flushingTom Stellard2013-08-171-3/+0
| | | | | | | | | | | | | | | | | It shouldn't be necessary to call radeon_winsys::cs_flush() from radeonsi_launch_grid(), because the state tracker is responsible for flushing the pipeline at the appropriate time. The current behavior is also wrong, because radeonsi_launch_grid() submits packets to the compute ring, but when the state tracker calls pipe->flush() everything is submitted to the graphics ring. This has the potential to create a race condition. The downside of removing this flush is that the compute dispatch packets will be sent to the graphics ring rather than the compute ring. In the future we will need to come up with a way to detect 'compute' command streams and submit them to the appropriate ring. Signed-off-by: Marek Olšák <[email protected]>
* nv50: add vp3/vp4 support for mpeg2/vc1Ilia Mirkin2013-08-1612-12/+927
| | | | | | | h264/mpeg4 remain disabled for pre-nvc0, there's some minor bug/difference which causes the decoding to hang after some frames. Signed-off-by: Ilia Mirkin <[email protected]>
* nv50: separate video logic from noallocIlia Mirkin2013-08-163-3/+6
| | | | | | | The upcoming vp3 logic will want the video layout, but allocated by the miptree. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30: remove no-longer-used formats from tableIlia Mirkin2013-08-161-3/+0
| | | | | | | | Commit 14ee790df77 removed the formats from the vtxfmt_table but forgot to also update the info_table. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "9.2 and 9.1" <[email protected]>
* radeonsi: Pixel shaders pre-load one more SGPRMichel Dänzer2013-08-151-2/+3
| | | | Acked-by: Marek Olšák <[email protected]>
* radeonsi: TGSI_SEMANTIC_CLIPVERTEX doesn't use any parametersMichel Dänzer2013-08-151-0/+1
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* radeonsi: Don't export unused clip distance vectors from vertex shaderMichel Dänzer2013-08-153-1/+14
| | | | | | | | E.g. the Source engine seems to always write to gl_ClipVertex, but normally doesn't enable any GL_CLIP_DISTANCEn states. This change removes some irrelevant parts from the generated vertex shader code in such cases. Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: Don't leave gaps between position exports from vertex shaderMichel Dänzer2013-08-153-59/+83
| | | | | | | | | | | If the vertex shader exports clip distances but not point size, use position exports 1/2 instead of 2/3 for the clip distances. Fixes geometry corruption in that case. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=66974 Cc: [email protected] Reviewed-by: Tom Stellard <[email protected]>
* llvmpipe: fix stencil bug if we have both stencil and depth testsRoland Scheidegger2013-08-151-14/+13
| | | | | | | | | | | | | This is a very well hidden bug found by accident (only the fixed glean tstencil2 test so far seems to hit it). We must use new mask with combined s_pass values and orig_mask values for zpass/zfail stencil ops, otherwise both the sfail op and one of zpass/zfail op are applied (probably not hit in most tests because some of the ops tend to be KEEP usually). Note: this is a candidate for the 9.2 branch. Reviewed-by: Zack Rusin <[email protected]>
* nvc0: move video param and format support functions to nouveauIlia Mirkin2013-08-155-70/+76
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: move firmware loading functions to nouveauIlia Mirkin2013-08-153-90/+108
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: move some of the simpler decoder functions into nouveauIlia Mirkin2013-08-153-62/+69
| | | | Signed-off-by: Ilia Mirkin <[email protected]>
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