| Commit message (Collapse) | Author | Age | Files | Lines |
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[airlied: final chunk of Mike's patch from bug 37476
this uses a loop to emit the GRADIENTS and does a check to
see if we need to fetch to a temporary register. It also
increases the context src gpr to 4 which is needed here.]
Signed-off-by: Dave Airlie <[email protected]>
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[airlied: taken from Mike's patch in bug 37476]
Signed-off-by: Dave Airlie <[email protected]>
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Mike had actually done a lot of the TXD support in a patch in bug
37476 which I see now, I'll add the bits of his work that I didn't think
to add to my work.
Signed-off-by: Dave Airlie <[email protected]>
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This at least passes the piglit arb_shader_texture_lod-texgrad test,
the AMD shader analyzer seems to multiply the V component by an unspecified
constant value no idea why.
Signed-off-by: Dave Airlie <[email protected]>
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This sets the base level as the zero level, which fixes
piglit/texturing/tex-miplevel-selection*.
The r600 hardware ignores the BASE_LEVEL field in some cases, so we can't
use it.
Evergreen might need this too.
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Copy-and-paste from the bgra cases. The C paths attempt to avoid
copying the 'x' channel, but it's harmless, you might as well. Good for
about 5% in glxgears (740 to 780 fps).
Signed-off-by: Adam Jackson <[email protected]>
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Used the vertprog instead of gmtyprog.
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fixes fdo bug 38145
Signed-off-by: Vadim Girlin <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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this needs a piglit run.
Signed-off-by: Dave Airlie <[email protected]>
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Snatched from xvmc.
Signed-off-by: Daniel Vetter <[email protected]>
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Put the shader programs into an immutable buffer object.
Also make sure that those object can be taken from the user
space buffer object pool.
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Fix an obvious typo in the yet unused part of the shader setup.
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No regressions found with :
- piglit (quick.tests)
- Unigine Heaven
- Lightsmark
- openarena
- Imprudence (Second Life fork)
agd5f Note: this patch was previously reverted due to piglit
regressions, but I'm not able to reproduce them here.
See this bug:
https://bugs.freedesktop.org/show_bug.cgi?id=34008
and discussion:
http://lists.freedesktop.org/archives/dri-devel/2011-June/011996.html
Signed-off-by: Alex Deucher <[email protected]>
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pipe_resource_reference call was miossing, thus creating massive memory under certain conditions.
Fix : https://bugs.freedesktop.org/show_bug.cgi?id=37168
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If the wrap R (3rd) mode is set to CLAMP or CLAMP_TO_BORDER and the texture
isn't 3D, r300 always samples the border color regardless of texture
coordinates.
I HATE THIS HARDWARE.
NOTE: This is a candidate for the 7.10 branch.
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Ideally we'd have a compiler and register spilling and all that
but this is good enough for now to avoid the gpu hang in piglit,
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined
on r600/r700 cards.
based on r600c patch
Andre Maasikas <[email protected]>
r600c: bump sq gpr resources if a shader needs more than default
Signed-off-by: Dave Airlie <[email protected]>
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NOTE: This is a candidate for the 7.10 branch.
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GLOBAL_GPR regs should be 0. Need to set the
number of temp regs in SQ_GPR_RESOURCE_MGMT_1.
Signed-off-by: Alex Deucher <[email protected]>
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need more sleep or something.
Signed-off-by: Dave Airlie <[email protected]>
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So only with kernel version 2.7 can this work, thanks to Alex
for pointing that out. Also add a workaround for a hw bug.
Signed-off-by: Dave Airlie <[email protected]>
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Evergreen can do this as well as cayman, so we should enable it.
This fixes a gpu lockup with
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined.shader_test
I need to add a better workaround for r600/r700.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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Since resources don't generally vary in size, this splits
the emit path, it also takes into a/c that texture and vertex resources
have different number of relocs, and avoids emitting the extra
reloc for vertex resources.
Signed-off-by: Dave Airlie <[email protected]>
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This relies on the reference member being first, so document it.
Signed-off-by: Dave Airlie <[email protected]>
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Not sure why these were included originally.
Signed-off-by: Alex Deucher <[email protected]>
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Use the new PCI ID table, make it simpler.
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Wondering why r600g needs to include r300_pci_ids.h
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At the end of flushing we were scanning over 450 blocks
with generally about 50 enabled. This reduces the scanning
to just the list of enabled blocks.
Signed-off-by: Dave Airlie <[email protected]>
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There isn't much point taking the overhead of range/block lookups on resources
we aren't going to be getting resource registers at wierd offsets.
Signed-off-by: Dave Airlie <[email protected]>
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resource setting could be a fair bit more lightweight,
this patch just separates the resource structs from the standard
reg tracking structs in the driver, later patches will improve
the winsys.
Signed-off-by: Dave Airlie <[email protected]>
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With complex shaders there are often "holes" in the fs inputs, and we only
have 8 tex coorsd to map those to. To fix this, we remap fs inputs to [0..8].
This lets us to run many more GLSL programs.
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This allows setting the path to the C++ compiler.
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