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path: root/src/gallium/drivers
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* vc4: Use r3 instead of r5 for temps, since r5 only has 32 bits of storageEric Anholt2014-08-081-8/+8
* vc4: Fix emit of ABSEric Anholt2014-08-081-1/+11
* vc4: Add shader variant caching to handle FS output swizzle.Eric Anholt2014-08-083-65/+232
* vc4: Load the tile buffer before incrementally drawing.Eric Anholt2014-08-082-27/+50
* vc4: Don't reallocate the tile alloc/state bos every frame.Eric Anholt2014-08-082-10/+21
* vc4: Add VC4_DEBUG env optionEric Anholt2014-08-085-14/+63
* vc4: Add support for SNE/SEQ/SGE/SLT.Eric Anholt2014-08-086-11/+96
* vc4: Use the user's actual first vertex attribute.Eric Anholt2014-08-084-35/+70
* vc4: Fix UBO allocation when no uniforms are used.Eric Anholt2014-08-081-1/+2
* vc4: Add initial support for math opcodesEric Anholt2014-08-082-1/+41
* vc4: Switch to actually generating vertex and fragment shader code from TGSI.Eric Anholt2014-08-0812-247/+1243
* vc4: Start converting the driver to use vertex shaders.Eric Anholt2014-08-083-45/+177
* vc4: Initial skeleton driver import.Eric Anholt2014-08-0826-0/+4438
* ilo: break down the format tableChia-I Wu2014-08-081-299/+431
* llvmpipe/tests: automake: link against libmesautil.laEmil Velikov2014-08-051-5/+6
* llvmpipe: implement support for cube map arraysRoland Scheidegger2014-08-055-4/+16
* svga: SVGA_3D_CMD_BIND_GB_SHADER needs to reserve two relocations.Matthew McClure2014-08-041-1/+1
* gallium: Move sRGB <-> RGB handling to libmesautilJason Ekstrand2014-08-043-2/+3
* util: Gather some common macrosJason Ekstrand2014-08-044-4/+2
* util: Move ralloc to a new src/util directory.Kenneth Graunke2014-08-042-1/+4
* llvmpipe: don't store number of layers per levelRoland Scheidegger2014-08-012-78/+50
* llvmpipe: integrate memory allocation into llvmpipe_texture_layoutRoland Scheidegger2014-08-011-45/+29
* llvmpipe: get rid of impossible code in alloc_image_dataRoland Scheidegger2014-08-011-26/+13
* r600g: Implement gpu_shader5 textureGatherGlenn Kennard2014-08-012-5/+36
* r600g/radeonsi: Prefer VRAM for CPU -> GPU streaming buffersMichel Dänzer2014-08-011-4/+11
* r600g/radeonsi: Reduce or even drop special treatment of persistent mappingsMichel Dänzer2014-08-011-4/+8
* r600g: gpu_shader5 gl_SampleMaskIn supportGlenn Kennard2014-07-312-7/+40
* r600g: Implement gpu_shader5 integer opsGlenn Kennard2014-07-311-0/+190
* r600g: Add IMUL_HI/UMUL_HI supportGlenn Kennard2014-07-311-6/+6
* r600g: Implement GL_ARB_texture_query_lodGlenn Kennard2014-07-312-2/+13
* dri: Add a new capabilities for drivers that can't share buffersGiovanni Campagna2014-07-301-1/+1
* svga: remove unneeded depth==1 assertion in svga_texture_view_surface()Brian Paul2014-07-291-1/+0
* gallium/radeon: Add some Emacs .dir-locals.el filesMichel Dänzer2014-07-293-0/+33
* ilo: fix fb height of HiZ opsChia-I Wu2014-07-291-1/+1
* r600g,radeonsi: switch all occurences of array_size to util_max_layerMarek Olšák2014-07-283-6/+10
* radeonsi: fix occlusion queries on HawaiiMarek Olšák2014-07-281-1/+7
* winsys/radeon: fix vram_size overflow with HawaiiMarek Olšák2014-07-281-1/+3
* radeonsi: fix a hang with streamout on HawaiiMarek Olšák2014-07-282-1/+14
* radeonsi: fix a hang with instancing on HawaiiMarek Olšák2014-07-281-1/+15
* radeonsi: fix CMASK and HTILE calculations for HawaiiMarek Olšák2014-07-281-2/+2
* r600g,radeonsi: add debug flags which disable tilingMarek Olšák2014-07-283-13/+24
* gallium: rename shader cap MAX_CONSTS to MAX_CONST_BUFFER_SIZEMarek Olšák2014-07-2811-26/+26
* r600g: switch SNORM conversion to DX and GLES behaviorMarek Olšák2014-07-284-7/+0
* ilo: correctly propagate resource renames to hardwareChia-I Wu2014-07-283-14/+30
* ilo: add ilo_resource_get_bo() helperChia-I Wu2014-07-282-17/+18
* radeonsi: Use util_memcpy_cpu_to_le32()Tom Stellard2014-07-282-19/+8
* r600g/compute: Add debug information to promote and demote functionsBruno Jiménez2014-07-281-4/+11
* r600g/compute: Add documentation to compute_memory_poolBruno Jiménez2014-07-282-31/+86
* ilo: unblock an inline write with a staging boChia-I Wu2014-07-281-13/+31
* ilo: try unblocking a transfer with a staging boChia-I Wu2014-07-284-19/+209
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