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* r600g: assume DISCARD_WHOLE_RESOURCE is always used with WRITEMarek Olšák2012-05-111-6/+5
* Merge branch 'master' of ssh://git.freedesktop.org/git/mesa/mesaMarek Olšák2012-05-111-1/+3
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| * radeon/llvm: Fix Evergreen/Cayman tablegen predicatesTom Stellard2012-05-111-1/+3
* | Merge branch 'gallium-userbuf'Marek Olšák2012-05-1158-317/+358
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| * svga: check for and skip null vertex buffer pointersBrian Paul2012-05-011-8/+12
| * softpipe: cast away const to silence warningBrian Paul2012-05-011-1/+2
| * svga: cast away const to silence warningBrian Paul2012-05-011-1/+2
| * gallium: remove pipe_resource::user_ptrMarek Olšák2012-04-309-20/+0
| * radeonsi: don't create temporary user buffer for r600_upload_const_bufferMarek Olšák2012-04-303-32/+25
| * gallium: add void *user_buffer to pipe_constant_bufferMarek Olšák2012-04-3016-18/+107
| * gallium: add void *user_buffer in pipe_index_bufferMarek Olšák2012-04-3018-63/+74
| * gallium: remove pipe_context::redefine_user_bufferMarek Olšák2012-04-3018-109/+0
| * gallium: add void *user_buffer in pipe_vertex_bufferMarek Olšák2012-04-309-11/+26
| * gallium: change set_constant_buffer to be UBO-friendlyMarek Olšák2012-04-3019-74/+87
| * gallium: add PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENTMarek Olšák2012-04-3010-0/+24
| * gallium: add PIPE_CAP_USER_INDEX_BUFFERS and PIPE_CAP_USER_CONSTANT_BUFFERSMarek Olšák2012-04-3010-0/+20
* | gallium/tgsi: s/TGSI_BUFFER/TGSI_TEXTURE_BUFFER/José Fonseca2012-05-111-2/+1
* | gallium/tgsi: Redefine the TGSI_TEXTURE_UNKNOWN texture target.José Fonseca2012-05-111-0/+2
* | llvmpipe: Fix triangle bounding box calculation to be correctly inclusive or ...James Benton2012-05-111-8/+6
* | llvmpipe: Change triangle rasterization comparison from < 0 to <= 0James Benton2012-05-111-1/+8
* | gallium/tgsi: Define the TGSI_BUFFER texture target.Francisco Jerez2012-05-111-2/+2
* | gallium/tgsi: Move interpolation info from tgsi_declaration to a separate token.Francisco Jerez2012-05-114-10/+11
* | gallium/tgsi: Split sampler views from shader resources.Francisco Jerez2012-05-112-25/+27
* | radeonsi: Properly translate vertex format swizzle.Michel Dänzer2012-05-113-23/+23
* | radeon/llvm: Remove AMDILMCCodeEmitter.cppTom Stellard2012-05-102-158/+0
* | radeon/llvm: Remove SILowerShaderInstructions.cppTom Stellard2012-05-104-81/+0
* | radeonsi/llvm: Move lowering of RETURN to ConvertToISA passTom Stellard2012-05-102-11/+2
* | radeon/llvm: Add some commentsTom Stellard2012-05-1064-422/+393
* | radeon/llvm: Move util functions into AMDGPU namespaceTom Stellard2012-05-103-39/+37
* | radeon/llvm: Auto-encode RAT_WRITE_CACHELESS_egTom Stellard2012-05-102-17/+0
* | radeon/llvm: Delete all instructions that have been custom loweredTom Stellard2012-05-101-4/+1
* | radeonsi: Set NONE format for unused vertex shader position export slots.Michel Dänzer2012-05-101-3/+3
* | radeonsi: Eliminate one more magic number for texture image resources.Michel Dänzer2012-05-101-3/+3
* | radeonsi: Fix vertex buffer resource for stride 0.Michel Dänzer2012-05-101-1/+5
* | radeon/llvm: Remove AMDGPUConstants.pmTom Stellard2012-05-092-45/+23
* | radeon/llvm: Don't rely on tablegen for lowering int_AMDGPU_load_constTom Stellard2012-05-095-38/+20
* | radeon/llvm: Make sure the LOAD_CONST def uses the isSI predicateTom Stellard2012-05-092-7/+7
* | svga: implement CEIL opcode translationBrian Paul2012-05-091-0/+28
* | gallium/drivers: handle TGSI_OPCODE_CEILChristoph Bumiller2012-05-094-0/+28
* | r600g: Handle TGSI_OPCODE_CEIL (v2)Kai Wasserbäch2012-05-091-3/+3
* | radeon/llvm: Remove AMDILUtilityFunctions.cppTom Stellard2012-05-0813-1041/+399
* | radeon/llvm: Remove some unused functions from AMDILInstrInfoTom Stellard2012-05-082-164/+0
* | radeon/llvm: Add some comments and fix coding styleTom Stellard2012-05-088-42/+41
* | radeon/llvm: Remove the EXPORT_REG instructionTom Stellard2012-05-0810-117/+8
* | radeon/llvm: Use a custom inserter to lower RESERVE_REGTom Stellard2012-05-0810-27/+83
* | radeon/llvm: Use a custom inserter to lower STORE_OUTPUTTom Stellard2012-05-084-34/+23
* | radeon/llvm: Remove AMDGPULowerShaderInstructions classTom Stellard2012-05-086-86/+4
* | radeon/llvm: Use a custom inserter to lower LOAD_INPUTTom Stellard2012-05-084-39/+15
* | radeon/llvm: Remove the ReorderPreloadInstructions passTom Stellard2012-05-089-100/+4
* | radeon/llvm: Remove old comment from AMDIL.hTom Stellard2012-05-081-5/+0
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