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* radeonsi: add a debug flag that disables printing the LLVM IR in shader dumpsMarek Olšák2015-07-316-29/+29
* radeonsi: store shader disassemblies in memory for future usersMarek Olšák2015-07-317-17/+18
* radeonsi: don't use llvm.AMDIL.fraction for FRC and DFRACMarek Olšák2015-07-311-4/+16
* gallium/radeon: re-enable unsafe math for graphics shadersMarek Olšák2015-07-311-0/+4
* gallium/radeon: don't use rsq_actionMarek Olšák2015-07-311-7/+3
* gallium/radeon: move r600-specific code to r600gMarek Olšák2015-07-312-152/+150
* gallium/radeon: remove unused variables and old commentsMarek Olšák2015-07-314-35/+0
* gallium/radeon: remove build_intrinsic and build_tgsi_intrinsicMarek Olšák2015-07-314-108/+58
* gallivm: add LLVMAttribute parameter to lp_build_intrinsicMarek Olšák2015-07-312-9/+9
* radeonsi: completely rework updating descriptors without CP DMAMarek Olšák2015-07-314-271/+128
* vc4: Lower uniform loads to scalar in NIR.Eric Anholt2015-07-302-31/+81
* vc4: Move some FS input lowering into NIR.Eric Anholt2015-07-302-35/+50
* vc4: Move program keys to the header file.Eric Anholt2015-07-302-47/+49
* vc4: Lower NIR inputs to scalar as well.Eric Anholt2015-07-302-4/+44
* vc4: Start adding a NIR-based output lowering pass.Eric Anholt2015-07-304-7/+137
* vc4: Mark our shaders as single-threaded.Eric Anholt2015-07-302-0/+6
* vc4: Avoid leaking indirect array access UBOs.Eric Anholt2015-07-301-0/+2
* vc4: Avoid overflowing various static tables.Eric Anholt2015-07-304-4/+4
* vc4: Fix return values from recent validation changes.Eric Anholt2015-07-301-4/+4
* radeonsi: enable GL4.1 and update documentation (v2)Dave Airlie2015-07-301-1/+1
* radeonsi: add GS multiple streams support (v2)Dave Airlie2015-07-306-39/+127
* svga: scons: remove unused HAVE_SYS_TYPES_H defineEmil Velikov2015-07-291-1/+0
* nvc0/ir: cache vertex out base so that we don't recompute againIlia Mirkin2015-07-291-8/+15
* nvc0/ir: output base for reading is based on laneidIlia Mirkin2015-07-291-0/+25
* radeon: add support for streams to the common streamout code. (v2)Dave Airlie2015-07-296-15/+50
* radeon: move streamout buffer config to streamout enable function. (v2)Dave Airlie2015-07-292-9/+15
* vc4: Skip re-emitting the shader_rec if it's unchanged.Eric Anholt2015-07-285-43/+158
* vc4: Drop unused vpm_offset value.Eric Anholt2015-07-281-3/+0
* vc4: Simplify vc4_use_bo and make sure it's not a shader.Eric Anholt2015-07-284-39/+26
* vc4: Keep the validated shader around for the simulator execution.Eric Anholt2015-07-283-13/+17
* vc4: Make the object be the return value from vc4_use_bo().Eric Anholt2015-07-283-23/+25
* vc4: Ensure that the bin CL is properly capped by increment/flush.Eric Anholt2015-07-283-26/+36
* vc4: Drop NV shader reloc validation.Eric Anholt2015-07-282-120/+60
* vc4: Fix raster surface shadow updates under DRI2.Eric Anholt2015-07-281-0/+6
* vc4: Fix bus errors on dumping CL on hardware.Eric Anholt2015-07-281-1/+1
* radeon: add streamout status 1-3 queries.Dave Airlie2015-07-292-2/+19
* r600,radeonsi: GL_ARB_conditional_render_invertedEdward O'Callaghan2015-07-293-11/+15
* radeonsi: add support for interpolateAt functions (v2)Dave Airlie2015-07-281-1/+240
* nvc0/ir: trim out barrier sync for non-compute shadersIlia Mirkin2015-07-281-0/+6
* nvc0/ir: fix barrier emissionIlia Mirkin2015-07-281-0/+2
* vc4: Add support for ARB_draw_elements_base_vertex.Eric Anholt2015-07-271-1/+3
* freedreno/ir3: add transform-feedback supportRob Clark2015-07-274-4/+230
* freedreno/ir3: track "keeps" in irRob Clark2015-07-274-23/+17
* freedreno/ir3: add support for store instructionsRob Clark2015-07-273-6/+43
* freedreno/ir3: cleanup driver-param stuffRob Clark2015-07-273-10/+31
* freedreno: add transform-feedback stateRob Clark2015-07-274-3/+95
* freedreno: add resource tracking support for written buffersRob Clark2015-07-274-12/+17
* freedreno/a3xx+a4xx: add support for vtxcnt semanticRob Clark2015-07-274-14/+31
* freedreno/ir3: add stream-output support to cmdline compilerRob Clark2015-07-271-4/+22
* freedreno/ir3: drop unused create_input() argRob Clark2015-07-271-11/+8
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