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* freedreno: a bit of query refactorRob Clark2017-04-224-40/+40
* freedreno: make hw-query a helperRob Clark2017-04-2213-16/+57
* nvc0: Add support for setting viewport index/layer from VS/TESIlia Mirkin2017-04-204-7/+27
* nvc0/ir: Only store viewport in scratch register for GPLyude2017-04-201-0/+1
* gallium: fold u_trim_pipe_prim call from st/mesa to driversMarek Olšák2017-04-208-0/+38
* swr: simd16 vs workTim Rowley2017-04-191-5/+25
* r600g: update dirty_level_mask after the 1-st draw after FB changeConstantine Kharlamov2017-04-194-18/+26
* freedreno: refactor dirty state handlingRob Clark2017-04-1819-101/+119
* freedreno: move clear path dirty state hack to a2xx backendRob Clark2017-04-182-9/+9
* freedreno/ir3: split out per-stage emit_consts fxnsRob Clark2017-04-185-21/+41
* freedreno: add helper to mark all state cleanRob Clark2017-04-189-52/+34
* freedreno: add helper to mark all state dirtyRob Clark2017-04-184-6/+13
* freedreno: move a2xx specific hack out of coreRob Clark2017-04-182-10/+20
* freedreno: make texture state an arrayRob Clark2017-04-1810-39/+45
* freedreno/ir3: refactor out helpers for comparing shader keysRob Clark2017-04-184-79/+63
* vc4: Enable V3D 2.6.Eric Anholt2017-04-181-1/+1
* freedreno: fix crash if ctx torn down with no renderingRob Clark2017-04-171-1/+1
* freedreno/ir3: add 'high' register classRob Clark2017-04-173-67/+131
* freedreno: extract helper for stage->sb for a4xx+Rob Clark2017-04-175-28/+29
* freedreno/{a4xx,a5xx}: switch to CP_LOAD_STATE4Rob Clark2017-04-175-127/+124
* freedreno: update generated headersRob Clark2017-04-178-213/+794
* gallium/radeon: always flush asynchronously and wait after begin_new_csMarek Olšák2017-04-172-4/+11
* radeonsi: remove local variable 'mod' from si_compile_tgsi_shaderMarek Olšák2017-04-171-5/+2
* radeonsi: add si_shader_selector::vs_needs_prologMarek Olšák2017-04-173-7/+10
* radeonsi: don't set VGT_GS_MODE as part of the GS stateMarek Olšák2017-04-171-2/+0
* radeonsi: don't allow user indices with indirect drawsMarek Olšák2017-04-171-4/+4
* radeonsi: merge two if (indirect) statementsMarek Olšák2017-04-171-27/+25
* radeonsi: don't mark non-dirty textures with CMASK as compressedMarek Olšák2017-04-171-2/+3
* etnaviv: native fence fd supportPhilipp Zabel2017-04-156-6/+82
* etnaviv: SINGLE_BUFFER support on GC3000Wladimir J. van der Laan2017-04-158-28/+63
* etnaviv: Update includes from rnndbWladimir J. van der Laan2017-04-155-20/+91
* etnaviv: Add chipMinorFeatures4 and 5Wladimir J. van der Laan2017-04-152-1/+15
* etnaviv: resolve tile status when flushing resourcePhilipp Zabel2017-04-152-0/+11
* etnaviv: stop repeatedly resolving an unchanged resource into its scanout pri...Philipp Zabel2017-04-151-1/+4
* swr: Add polygon stipple supportGeorge Kyriazis2017-04-145-9/+84
* radeonsi: add missing initialization for userptr buffersNicolai Hähnle2017-04-141-0/+4
* radeonsi: cope with missing disassemblyNicolai Hähnle2017-04-141-1/+2
* gallium/ddebug: dump missing members of pipe_draw_infoNicolai Hähnle2017-04-141-0/+2
* radeonsi: enable ARB_shader_viewport_layer_arrayNicolai Hähnle2017-04-141-1/+1
* radeonsi: handle ignored LAYER and VIEWPORT_INDEX writesNicolai Hähnle2017-04-141-0/+20
* gallium: add PIPE_CAP_TGSI_TES_LAYER_VIEWPORTNicolai Hähnle2017-04-1415-0/+15
* swr: Enable MSAA in OpenSWR software rendererBruce Cherniak2017-04-146-25/+313
* swr: Removed unnecessary PIPE_BIND flags from swr_is_format_supportedBruce Cherniak2017-04-141-2/+1
* swr: Align swr_context allocation to SIMD alignment.Bruce Cherniak2017-04-141-2/+5
* freedreno: enable draw/batch reordering by defaultRob Clark2017-04-142-3/+3
* freedreno/ir3: small re-orderRob Clark2017-04-141-24/+23
* freedreno/ir3: move 'keeps' to block levelRob Clark2017-04-145-20/+22
* freedreno/ir3: convert dynamic arrays to rallocRob Clark2017-04-143-14/+8
* swr: add linux to scons buildGeorge Kyriazis2017-04-141-6/+1
* gallium/radeon: never use staging buffers with AMD_pinned_memoryNicolai Hähnle2017-04-131-2/+16
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