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* r300g: add blacklist for apps that shouldn't steal hyperz accessMarek Olšák2012-12-021-0/+28
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* r300g: enable Hyper-Z by default on r500Marek Olšák2012-12-021-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | I fixed the only known bugs on r500 with 0222b2bd4107b9e5cabfbc06c1a6ca3eae. Now there are no piglit regressions with Hyper-Z and all apps I tested seem to work. To summarize how it works: - Only one process can use it at a time. This is a hardware limitation. - The first process to clear a zbuffer gets the exclusive access to use Hyper-Z. - Compositors don't use any zbuffer, so they won't steal it, but some web browsers do, so make sure there's no web browser running if you want your game to use Hyper-Z. - There's no need to restart an app which couldn't get the access to Hyper-Z. Just quit the app which took it, the driver can turn it on for the other app in the middle of rendering. - If an app gets the access to Hyper-Z, it prints "radeon: Acquired Hyper-Z" to stdout. r300-r400: Hyper-Z will be enabled by default on r300-r400 once sufficient testing is done with piglit and Lightsmark at least. Be sure to set the env var RADEON_HYPERZ and run piglit with parameters: -c 0
* r300g: clear the ZB cache before clearing ZMASK or HIZMarek Olšák2012-12-022-2/+8
| | | | | | | This fixes wrong rendering in Lightsmark and the piglit/depthstencil-render-miplevels. I think I fixed Hyper-Z. So far every app seems to work like a charm.
* Revert "r300g: fix occlusion queries when depth test is disabled or zbuffer ↵Marek Olšák2012-12-022-27/+6
| | | | | | is missing" It broke Hyper-Z terribly.
* r300g: refuse to create too large texturesMarek Olšák2012-12-011-0/+15
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* r300g: fix memory leaks in texture_create error pathsMarek Olšák2012-12-011-9/+15
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* r300g: fix revoking hyperz accessMarek Olšák2012-12-011-20/+22
| | | | | The bug was uncovered by 67c8e96f5ace67f9c17556934ee9532877d3a00. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=57763
* r300g: handle map flag DISCARD_WHOLE_RESOURCEMarek Olšák2012-12-013-4/+36
| | | | | This should improve performance in apps which trigger this codepath. (e.g. Wine does)
* svga: remove pointless assert on unsigned >= 0Dave Airlie2012-12-011-1/+0
| | | | | | | | | | all unsigneds are >= 0 :-) There may be an argument for leaving this in, in case someone changes min_lod to an integer, so feel free to apply or drop. Reviewed-by: Brian Paul <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r300g: fix comparison of hyperz flush time.Dave Airlie2012-12-011-1/+1
| | | | | | | | | | I haven't confirmed this is doing the correct thing, but at least this might make someone review it! Reported by internal RH coverity scan. Signed-off-by: Dave Airlie <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* llvmpipe: Remove remnants of lp_tile_soa from Makefile.José Fonseca2012-11-302-4/+0
| | | | | | Completely forgot about updating Makefile when removing it. Stephane already fixed the make build, but there were a few mentions of lp_tile_soa left in the tree.
* llvmpipe: Fix incorrect sizeof.Vinson Lee2012-11-291-2/+2
| | | | | | | Fixes sizeof not portable defects reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: Fix build break from 75da95c50Stéphane Marchesin2012-11-291-2/+1
| | | | | | The Makefile looks for a file which is gone (lp_tile_soa.c) http://bugs.freedesktop.org/show_bug.cgi?id=57713
* r600g: mirror simplification of if/break opcodesVincent Lejeune2012-11-291-32/+12
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* r600g: separate resource_id and sampler_id tex info in tgsi-to-llvmVincent Lejeune2012-11-291-0/+3
| | | | Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
* llvmpipe: support array texturesRoland Scheidegger2012-11-296-7/+32
| | | | | | | | | | This adds array (1d,2d) texture support to llvmpipe. Though probably should do something about 1d array textures requiring gobs of memory (this issue is not strictly limited to arrays but it is probably worse there). Initial code by Jakob Bornecrantz <[email protected]> Reviewed-by: José Fonseca <[email protected]>
* llvmpipe: Remove lp_build_blend_soa()José Fonseca2012-11-295-538/+37
| | | | | | No longer used/necessary, as we always blend in AoS now. Trivial.
* llvmpipe: Eliminate color buffer swizzling.José Fonseca2012-11-2917-1334/+30
| | | | | | | | | | | | Now dead code. Also had to remove the show_tiles/show_subtiles because now the color buffers are always stored in their native format, so there is no longer an easy way to paint the tile sizes. Depth-stencil buffers are still swizzled. Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: Only advertise unswizzled formats.José Fonseca2012-11-293-25/+17
| | | | | | | | | | | | | | Update llvmpipe_is_format_supported and llvmpipe_is_format_unswizzled so that only the formats that we can render without swizzling are advertised. We can still render all D3D10 required formats except PIPE_FORMAT_R11G11B10_FLOAT, which needs to be implemented in a future opportunity. Removal of rendertarget swizzling will be done in a subsequent change. Reviewed-by: Roland Scheidegger <[email protected]>
* radeonsi: Bitcast result of packf16 intrinsic to float for export intrinsic.Michel Dänzer2012-11-291-1/+5
| | | | | | | Fixes 7 piglit tests, and prevents many more from crashing. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-and-Tested-by: Christian König <[email protected]>
* llvmpipe: Implement logic ops for the AoS path.José Fonseca2012-11-281-1/+8
| | | | | | | It was forgotten in the previous patch series, but it is trivial to implement, based on the SoA path. This fixes glean logicOp failures.
* llvmpipe: Don't use dynamically sized arrays.José Fonseca2012-11-281-4/+4
| | | | | Unfortunately for MSVC arrays with a constant variable size are still considered dynamically sized.
* llvmpipe: Update llvmpipe_is_format_unswizzled to reflect latest changes.James Benton2012-11-281-9/+0
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: Enable vertex color clamping.James Benton2012-11-281-1/+1
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: Unswizzled rendering.James Benton2012-11-2815-128/+1422
| | | | Reviewed-by: Jose Fonseca <[email protected]>
* gallivm: Updated lp_build_const_mask_aos to input number of channels.James Benton2012-11-282-2/+5
| | | | | | Also updated lp_build_const_mask_aos_swizzled to reflect this. Reviewed-by: Jose Fonseca <[email protected]>
* radeonsi: Reinstate assertions against invalid colour/depth formats.Michel Dänzer2012-11-281-0/+2
| | | | | | | | | | | radeonsi now supports Z16 and doesn't fail these assertions anymore. This partially reverts commit 7bba4879bb79719e22a18b52759b1d1d839c783c, but leaves the error messages in place to allow diagnosing such problems even with non-debugging builds. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: Re-enable Z16 depth buffers.Michel Dänzer2012-11-281-2/+2
| | | | | | | 8 more piglits. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeonsi: remove redundant parameter in r600_init_surfaceMarek Olšák2012-11-281-5/+4
| | | | [ Cherry-picked from r600g commit f5ac60152b10b04d38e77db6b904dd50d1a54d6c ]
* radeonsi: Use explicit stencil mipmap level offsets.Michel Dänzer2012-11-282-7/+6
| | | | | | Extracted from r600g commit 428e37c2da420f7dc14a2ea265f2387270f9bee1. Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: correct texture memory size for Z32F_S8X24Marek Olšák2012-11-281-7/+15
| | | | [ Cherry-picked from r600g commit ea72351a919c594e7f40e901dca42aebb866f8a6 ]
* radeonsi: Depth/stencil fixes.Michel Dänzer2012-11-282-8/+21
| | | | | | Adapted from r600g commit 018e3f75d69490598d61059ece56d379867f3995. Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: Flesh out support for depth/stencil exports from the pixel shader.Michel Dänzer2012-11-282-6/+68
| | | | Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: Fix sampler views for depth textures.Michel Dänzer2012-11-282-5/+6
| | | | | | | Consistently reference the flushed depth texture in the sampler view, not the original one. Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: Fix z/stencil texture creation.Jerome Glisse2012-11-281-9/+5
| | | | | | Signed-off-by: Jerome Glisse <[email protected]> [ Cherry-picked from r600g commit b4f0ab0b22625ac1bb3cf16342039557c086ebae ]
* gallivm,llvmpipe: handle TXF (texelFetch) instruction, including offsetsRoland Scheidegger2012-11-272-4/+9
| | | | | | | | | | | | | This also adds some code to handle per-quad lods for more than 4-wide fetches, because otherwise I'd have to integrate the texelFetch function into the splitting stuff... (but it is not used yet outside texelFetch). passes piglit fs-texelFetch-2D, fails fs-texelFetchOffset-2D due to I believe a test error (results are undefined for out-of-bounds fetches, we return whatever is at offset 0, whereas the test expects [0,0,0,1]). Texel offsets are only handled by texelFetch for now, though the interface can handle it for everything. Reviewed-by: José Fonseca <[email protected]>
* r600g: fix broken streamout if streamout_begin caused a context flushMarek Olšák2012-11-231-2/+6
| | | | | | | This fixes graphics corruption in the case where the DISCARD_RANGE flag is used to map a buffer. NOTE: This is a candidate for the stable branches.
* r600g: fix ARB_map_buffer_alignment with unaligned offsets and staging buffersMarek Olšák2012-11-223-3/+8
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* r300/compiler: Avoid generating MOV instructions for invalid IMM swizzles v2Tom Stellard2012-11-161-4/+349
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If an instruction reads from a constant register that contains immediates using an invalid swizzle, we can avoid generating MOV instructions to fix up the swizzle by loading the immediates into a different constant register that can be read using a valid swizzle. This only affects r300 and r400 cards. For example: CONST[1] = { -3.5000 3.5000 2.5000 1.5000 } MAD temp[4].xy, const[0].xy__, const[1].xz__, input[0].xy__; ========== Before this change would be lowered to: ========= CONST[1] = { -3.5000 3.5000 2.5000 1.5000 } MOV temp[0].x, const[1].x___; MOV temp[0].y, const[1]._z__; MAD temp[4].xy, const[0].xy__, temp[0].xy__, input[0].xy__; ========== After this change is lowered to: =============== CONST[1] = { -3.5000 3.5000 2.5000 1.5000 } CONST[2] = { 0.0000 -3.5000 2.5000 0.0000 } MAD temp[4].xy, const[0].xy__, const[2].yz__, input[0].xy__; ============================================================ This change reduces one of the Lightsmark shaders from 133 to 91 instructions. v2: - Fix crash caused by swizzles with only inline constants.
* radeonsi: clean up some magic numbersAlex Deucher2012-11-161-1/+2
| | | | | Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: emit PA_SC_RASTER_CONFIGAlex Deucher2012-11-161-0/+11
| | | | | | | | | | | | | Use per asic golden values. Programming this register doesn't seem to be strictly necessary on SI, but programming it wrong leads to rendering issues or reduced performance so just go ahead and program the golden values explicitly to avoid any potential problems down the road. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: remove new asserts and replace with warningsAlex Deucher2012-11-151-2/+6
| | | | | | Fixes piglit regressions. Signed-off-by: Alex Deucher <[email protected]>
* radeonsi: cleanup si_db()Alex Deucher2012-11-152-12/+12
| | | | | | | | Clean up a few magic numbers and rework the code a bit. Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: assert the CB format is valid (v2)Alex Deucher2012-11-151-2/+3
| | | | | | | | | | | Assert the the CB format is valid and default to the INVALID hw format rather than ~0U when the format doesn't match for non-debug builds. v2: use INVALID hw format rather than ~0U Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: assert that the DB format is valid (v2)Alex Deucher2012-11-151-8/+5
| | | | | | | | | | | Assert that the DB format is valid and default to the INVALID hw format rather than ~0U when the format doesn't match for non-debug builds. v2: use INVALID hw format rather than ~0U Signed-off-by: Alex Deucher <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: Set STENCILOPVAL fields to 1.Michel Dänzer2012-11-141-2/+4
| | | | | | | | This is necessary for backwards compatibility with pre-SI for stencil. Fixes a number of stencil related piglit tests, and real apps using stencil. Signed-off-by: Michel Dänzer <[email protected]>
* radeonsi: Bump SI_PM4_MAX_DW.Michel Dänzer2012-11-141-1/+1
| | | | | | | Fixes assertion failure with Mesa demo glsl/samplers. Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Handle TGSI TXL opcode.Michel Dänzer2012-11-141-0/+7
| | | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: Handle TGSI TXB opcode.Michel Dänzer2012-11-141-0/+7
| | | | | | Signed-off-by: Michel Dänzer <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* r600g: use LINEAR_ALIGNED tiling for 1D array textures and if height0 <= 3Marek Olšák2012-11-131-1/+3
| | | | Reviewed-by: Alex Deucher <[email protected]>
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