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* broadcom/vc5: Fix incorrect padding of TF outputs.Eric Anholt2017-11-221-0/+2
* broadcom/vc5: Fix UIF surface size setup for ARB_fbo's mismatched sizes.Eric Anholt2017-11-221-2/+23
* etnaviv: Put HALTI level in specsWladimir J. van der Laan2017-11-222-0/+23
* etnaviv: Const-correctness etnaviv_emit.hWladimir J. van der Laan2017-11-221-1/+1
* llvmpipe: fix snorm blendingRoland Scheidegger2017-11-212-28/+159
* r600: add cull distance supportDave Airlie2017-11-216-6/+24
* broadcom/vc5: Align 1D texture miplevels to 64b.Eric Anholt2017-11-201-0/+2
* broadcom/vc5: Clamp min lod to the last level.Eric Anholt2017-11-201-2/+3
* broadcom/vc5: Increase simulator memory for tex-miplevel-selection.Eric Anholt2017-11-201-1/+1
* swr/rast: Repair simd8 frontend code rotTim Rowley2017-11-201-1/+1
* swr/rast: Implement AVX-512 GATHERPS in SIMD16 fetch shaderTim Rowley2017-11-204-29/+220
* swr/rast: Simplify GATHER* jit builder apiTim Rowley2017-11-204-48/+48
* swr/rast: Add alignment to transpose targetsTim Rowley2017-11-201-8/+8
* swr/rast: Cache eventmanagerTim Rowley2017-11-203-0/+9
* swr/rast: Enable AVX-512 targets in the jitterTim Rowley2017-11-202-10/+0
* swr/rast: Points with clipdistance can't go through simplepoints pathTim Rowley2017-11-201-1/+2
* swr/rast: Code style change (NFC)Tim Rowley2017-11-201-2/+7
* swr/rast: Widen fetch shader to SIMD16Tim Rowley2017-11-205-3/+151
* swr/rast: Support flexible vertex layout for DS outputTim Rowley2017-11-202-0/+3
* gallium/u_threaded: avoid syncing in threaded_context_flushNicolai Hähnle2017-11-201-1/+2
* radeonsi: avoid syncing the driver thread in si_fence_finishNicolai Hähnle2017-11-202-37/+41
* radeonsi: recompute the relative timeout after waiting for ready fenceNicolai Hähnle2017-11-201-0/+5
* ddebug: fix the hang detection timeout calculationNicolai Hähnle2017-11-201-2/+2
* ddebug: fix use-after-free of streamout targetsNicolai Hähnle2017-11-201-1/+1
* radeonsi/gfx9: fix VM fault with fetched instance divisorsNicolai Hähnle2017-11-202-5/+12
* broadcom/vc5: Fix up integer texture handling.Eric Anholt2017-11-191-27/+28
* broadcom/vc5: Fix simulator assertion failures about color RT clears.Eric Anholt2017-11-191-2/+19
* freedreno/ir3: add texture gather supportRob Clark2017-11-182-2/+17
* etnaviv: enable full overwrite when no color buffer is presentLucas Stach2017-11-182-3/+3
* broadcom/vc5: Set up the padded height at surface creation time.Eric Anholt2017-11-173-16/+15
* broadcom/vc5: Fix clear color for swap_color_rb render targets.Eric Anholt2017-11-171-0/+9
* broadcom/vc5: Fix pasteo in front stencil ref value setup.Eric Anholt2017-11-171-1/+1
* broadcom/vc5: Fix colormasking when we need to swap r/b colors.Eric Anholt2017-11-171-9/+24
* broadcom/vc5: Enable the Z min/max clipping planes.Eric Anholt2017-11-171-2/+0
* broadcom/vc5: Fix driver for new PIPE_SHADER_CAP_MAX_HW_ATOMIC_*.Eric Anholt2017-11-171-0/+2
* r300: add PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER* switch casesBrian Paul2017-11-171-0/+2
* radeon/video: enable encode support for ravenBoyuan Zhang2017-11-171-1/+2
* radeonsi: enable vcn encodeBoyuan Zhang2017-11-171-1/+3
* radeon/vcn: add create encoderBoyuan Zhang2017-11-171-1/+81
* radeon/vcn: add encode get feedbackBoyuan Zhang2017-11-171-1/+14
* radeon/vcn: add encode destroyBoyuan Zhang2017-11-171-1/+15
* radeon/vcn: add encode end frameBoyuan Zhang2017-11-171-1/+2
* radeon/vcn: add encode bitstreamBoyuan Zhang2017-11-171-1/+13
* radeon/vcn: add encode begin frameBoyuan Zhang2017-11-171-1/+22
* radeon/vcn: add encode header implementationsBoyuan Zhang2017-11-172-0/+241
* radeon/vcn: add encode header algorithmsBoyuan Zhang2017-11-172-0/+127
* radeon/vcn: add ib implementationsBoyuan Zhang2017-11-171-24/+268
* radeon/vcn: add common encode partBoyuan Zhang2017-11-175-0/+489
* radeon/winsys: add vcn enc ring typeBoyuan Zhang2017-11-171-0/+1
* radeon/vcn: add vcn encode interfaceBoyuan Zhang2017-11-171-0/+325
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