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* nvc0: fix the driver cb size when draw parameters are usedSamuel Pitoiset2016-07-111-2/+2
* nvc0/ir: fix images indirect access on FermiSamuel Pitoiset2016-07-111-0/+7
* radeonsi: fix bad assertion in si_emit_sample_maskNicolai Hähnle2016-07-091-1/+2
* radeon/uvd: simplify sending context buffer messageChristian König2016-07-081-4/+1
* radeon/uvd: fix contex buffer destruction in the error pathChristian König2016-07-081-6/+2
* radeon/uvd: move polaris fw check into radeon_video.c v2Christian König2016-07-082-11/+13
* radeon/video: fix coding style in radeon_video.c v2Christian König2016-07-081-15/+15
* svga: simplify/fix 1D/2D array resource copiesBrian Paul2016-07-081-26/+12
* svga: remove unused variableBrian Paul2016-07-081-1/+0
* svga: add dumping for more device commandsBrian Paul2016-07-081-155/+724
* svga: silence a couple unused variable warningsBrian Paul2016-07-082-1/+3
* svga: rebind using render target surfaces in hw draw stateCharmaine Lee2016-07-081-6/+6
* svga: invalidate gb surface before it is reusedCharmaine Lee2016-07-083-9/+50
* svga: fix use of provoking vertex controlBrian Paul2016-07-081-1/+4
* nvc0/ir: remove unused resource info loading helpersSamuel Pitoiset2016-07-082-28/+0
* nvc0/ir: refactor the surfaces info loading logicSamuel Pitoiset2016-07-082-82/+44
* nvc0/ir: move the shift left op inside loadTexHandle()Samuel Pitoiset2016-07-081-8/+6
* radeonsi: disable multi-threading when shader dumps are enabledNicolai Hähnle2016-07-081-0/+1
* radeonsi: use multi-threaded compilation in debug contextsNicolai Hähnle2016-07-081-4/+4
* radeonsi: catch a potential state tracker error with non-MSAA FBsNicolai Hähnle2016-07-081-0/+6
* radeonsi: explicitly choose center locations for 1xAA on PolarisNicolai Hähnle2016-07-085-18/+48
* r600g: call cayman_emit_msaa_sample_locs only when neededNicolai Hähnle2016-07-081-1/+2
* radeon/llvm: Use alloca instructions for larger arraysTom Stellard2016-07-062-25/+151
* radeon/llvm: Add helpers for loading and storing data from arrays.Tom Stellard2016-07-061-10/+41
* radeon/llvm: Remove uses_temp_indirect_addressing() functionTom Stellard2016-07-061-23/+1
* gallium/radeon: add depth/stencil_adjusted output to surface computationNicolai Hähnle2016-07-062-2/+10
* gallium/radeon: allocate only the required plane for flushed depthNicolai Hähnle2016-07-061-3/+34
* radeonsi: decompress to flushed depth texture when requiredNicolai Hähnle2016-07-061-29/+103
* radeonsi: extract DB->CB copy logic into its own functionNicolai Hähnle2016-07-061-36/+61
* radeonsi: sample from flushed depth texture when requiredNicolai Hähnle2016-07-062-8/+46
* gallium/radeon: replace is_flushing_texture with db_compatibleNicolai Hähnle2016-07-069-19/+24
* gallium/radeon: add can_sample_z/s flags for texturesNicolai Hähnle2016-07-065-24/+34
* radeonsi: correctly mark levels of 3D textures as fully decompressedNicolai Hähnle2016-07-061-2/+2
* gallium/radeon/winsyses: remove unused stencil_offsetNicolai Hähnle2016-07-061-1/+0
* gallium/radeon: remove redundant null-pointer checkNicolai Hähnle2016-07-061-2/+1
* gallium/radeon: print StencilLayout only onceNicolai Hähnle2016-07-061-2/+2
* gallium/radeon: flush stdout after printing texture informationNicolai Hähnle2016-07-061-0/+1
* svga: avoid emitting redundant DXSetRenderTargets commandCharmaine Lee2016-07-052-18/+32
* radeon/vce: update encRefPic addr and array mode to tiledLeo Liu2016-07-051-0/+1
* radeon/vce: increase cpb height alignmentLeo Liu2016-07-051-1/+1
* swr: automake: don't ship LLVM version specific generated sourcesEmil Velikov2016-07-051-2/+43
* nvc0/ir: rename NVE4_SU_INFO_XXX to NVC0_SU_INFO_XXXSamuel Pitoiset2016-07-051-49/+49
* nvc0/ir: reset the base offset for indirect images accessesSamuel Pitoiset2016-07-051-2/+4
* gm107/ir: fix sign bit emission for FADD32ISamuel Pitoiset2016-07-051-3/+6
* vc4: Regularize instruction emit macrosEric Anholt2016-07-042-39/+50
* vc4: Enable dead CF elimination.Eric Anholt2016-07-041-0/+1
* vc4: Optimize out redundant SF updates.Eric Anholt2016-07-042-6/+78
* vc4: Move SF removal to a separate peephole pass.Eric Anholt2016-07-045-17/+85
* vc4: DCE instructions with a NULL destination.Eric Anholt2016-07-041-2/+3
* vc4: Mark texturing setup instructions as having side effects.Eric Anholt2016-07-041-5/+5
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