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drivers
Commit message (
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Author
Age
Files
Lines
*
android: enable the radeonsi driver
Chih-Wei Huang
2015-06-09
1
-0
/
+4
*
softpipe/query: force parenthesis around a logical not
Martin Peres
2015-06-08
1
-1
/
+1
*
radeonsi: Add CIK SDMA support
Michel Dänzer
2015-06-08
7
-21
/
+427
*
r600g,radeonsi: Assert that there's enough space after flushing
Michel Dänzer
2015-06-08
1
-3
/
+2
*
r600g: fix a coverity defect in streamout code
Marek Olšák
2015-06-05
1
-1
/
+1
*
tgsi/ureg: don't emit in/out arrays if drivers don't support ranged declarations
Marek Olšák
2015-06-05
10
-0
/
+13
*
llvmpipe: Implement stencil export
Roland Scheidegger
2015-06-04
4
-15
/
+21
*
vc4: Don't bother with safe list traversal in CSE.
Eric Anholt
2015-05-29
1
-1
/
+1
*
vc4: Convert from simple_list.h to list.h
Eric Anholt
2015-05-29
19
-139
/
+87
*
vc4: Make sure we allocate idle BOs from the cache.
Eric Anholt
2015-05-29
1
-1
/
+11
*
vc4: Fix return value handling for BO waits.
Eric Anholt
2015-05-29
1
-12
/
+15
*
radeon/llvm: reset temps_count on deallocation
Marek Olšák
2015-05-29
1
-0
/
+1
*
radeon/llvm: don't use a static array size for radeon_llvm_context::arrays (v2)
Marek Olšák
2015-05-29
2
-7
/
+12
*
softpipe: fix offset wrapping calculations (v2)
Dave Airlie
2015-05-29
1
-78
/
+68
*
vc4: Just stream out fallback IB contents.
Eric Anholt
2015-05-27
6
-42
/
+41
*
vc4: Don't try to put our dmabuf-exported BOs into the BO cache.
Eric Anholt
2015-05-27
1
-0
/
+1
*
vc4: Don't forget to make our raster shadow textures non-raster.
Eric Anholt
2015-05-27
1
-0
/
+3
*
vc4: make vc4_begin_query() return a boolean
Samuel Pitoiset
2015-05-27
1
-1
/
+2
*
radeonsi: use a switch statement in si_delete_shader_selector
Marek Olšák
2015-05-26
1
-6
/
+13
*
radeonsi: use a switch statement in si_shader_selector_key
Marek Olšák
2015-05-26
1
-9
/
+16
*
radeonsi: fix scratch buffer setup for geometry shaders
Marek Olšák
2015-05-26
1
-2
/
+9
*
radeonsi: remove unused cases from si_shader_io_get_unique_index
Marek Olšák
2015-05-26
1
-14
/
+3
*
radeonsi: don't count special outputs for the VS export count
Marek Olšák
2015-05-26
1
-0
/
+5
*
radeonsi: add support for PIPE_CAP_TGSI_TEXCOORD
Marek Olšák
2015-05-26
4
-15
/
+13
*
gallium: use const in set_tess_state
Marek Olšák
2015-05-26
1
-2
/
+2
*
nv30: falling back to draw path for edgeflag does no good
Ilia Mirkin
2015-05-25
1
-3
/
+2
*
nv30/draw: switch varying hookup logic to know about texcoords
Ilia Mirkin
2015-05-25
1
-9
/
+16
*
nv30/draw: allocate vertex buffers in gart
Ilia Mirkin
2015-05-25
1
-6
/
+10
*
nv30/draw: only use the DMA1 object (GART) if the bo is not in VRAM
Ilia Mirkin
2015-05-25
1
-3
/
+3
*
nv30/draw: fix indexed draws with swtnl path and a resource index buffer
Ilia Mirkin
2015-05-25
1
-3
/
+3
*
llvmpipe: (trivial) add parantheses in (!x == y) expression
Roland Scheidegger
2015-05-25
1
-1
/
+1
*
nv30/draw: draw expects constbuf size in bytes, not vec4 units
Ilia Mirkin
2015-05-25
1
-1
/
+1
*
nv30/draw: avoid leaving stale pointers in draw state
Ilia Mirkin
2015-05-25
1
-4
/
+4
*
nv30: fix clip plane uploads and enable changes
Ilia Mirkin
2015-05-24
1
-9
/
+7
*
nv30: avoid doing extra work on clear and hitting unexpected states
Ilia Mirkin
2015-05-24
5
-9
/
+11
*
nv30: avoid leaking render state and draw shaders
Ilia Mirkin
2015-05-24
3
-0
/
+16
*
nv30: don't leak fragprog consts
Ilia Mirkin
2015-05-24
1
-0
/
+1
*
nv50/ir: avoid messing up arg1 of PFETCH
Ilia Mirkin
2015-05-23
1
-2
/
+18
*
nv30: check nouveau_bo_map output of notify bo
Ilia Mirkin
2015-05-23
1
-1
/
+1
*
nvc0: a geometry shader can have up to 1024 vertices output
Ilia Mirkin
2015-05-23
1
-1
/
+1
*
nv50: fix PIPE_QUERY_TIMESTAMP_DISJOINT, based on nvc0
Samuel Pitoiset
2015-05-23
1
-17
/
+22
*
nvc0/ir: LOAD's can't be used for shader inputs
Ilia Mirkin
2015-05-22
2
-0
/
+2
*
nv50/ir: guess that the constant offset is the starting slot of array
Ilia Mirkin
2015-05-22
1
-2
/
+4
*
nvc0/ir: set ftz when sources are floats, not just destinations
Ilia Mirkin
2015-05-22
1
-3
/
+2
*
nv50/ir: allow OP_SET to merge with OP_SET_AND/etc as well as a neg
Ilia Mirkin
2015-05-22
1
-26
/
+55
*
nvc0/ir: optimize set & 1.0 to produce boolean-float sets
Ilia Mirkin
2015-05-22
2
-0
/
+29
*
nvc0/ir: allow iset to produce a boolean float
Ilia Mirkin
2015-05-22
3
-5
/
+16
*
nvc0/ir: avoid jumping to a sched instruction
Ilia Mirkin
2015-05-22
3
-2
/
+9
*
nv50: fix PIPELINE_STATISTICS with HUD, based on nvc0
Samuel Pitoiset
2015-05-22
1
-1
/
+2
*
nv50: fix 64-bit queries with HUD, based on nvc0
Samuel Pitoiset
2015-05-22
1
-1
/
+13
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