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* freedreno/a3xx/compiler: prepare for new compilerRob Clark2014-02-039-146/+308
* freedreno/a3xx: remove useless reg tracking in disasm-a3xxRob Clark2014-02-031-174/+0
* svga: check shader size against max command buffer sizeBrian Paul2014-02-032-12/+49
* svga: refactor some shader codeBrian Paul2014-02-0311-76/+171
* freedreno: better manage our WFI'sRob Clark2014-02-017-24/+36
* freedreno/a3xx: add logicopRob Clark2014-02-013-6/+27
* freedreno/a3xx: handle frag z writeRob Clark2014-02-017-25/+53
* freedreno: resync generated headersRob Clark2014-02-014-9/+39
* freedreno/a3xx: fix const confusionRob Clark2014-02-012-9/+9
* freedreno/a3xx/compiler: compiler cleanupsRob Clark2014-02-017-145/+198
* freedreno/compiler/a3xx: remove lowered instructionsRob Clark2014-02-011-354/+0
* freedreno: add tgsi lowering passRob Clark2014-02-014-2/+1229
* freedreno/a3xx/compiler: add CLAMPRob Clark2014-02-011-7/+24
* freedreno/a3xx/compiler: various fixesRob Clark2014-02-011-14/+34
* freedreno: ctx should hold ref to devRob Clark2014-02-016-2/+8
* freedreno: add prims-emitted driver queryRob Clark2014-02-011-0/+1
* llvmpipe: fix denorm handling for r11g11b10_float format when blendingRoland Scheidegger2014-01-311-2/+15
* r600g: Removed unnecessary positivity check for unsigned int variable.Siavash Eliasi2014-01-311-1/+1
* freedreno: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Ian Romanick2014-01-291-0/+3
* ilo: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+1
* svga: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
* i915g: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+3
* i915g: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-1/+1
* llvmpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
* llvmpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-3/+3
* softpipe: Set PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT to 64Siavash Eliasi2014-01-291-1/+2
* softpipe: Use alignment of 64 instead of 16 for buffer allocationSiavash Eliasi2014-01-291-2/+2
* i915g: support more PIPE_CAPsStéphane Marchesin2014-01-281-3/+6
* radeonsi: Put GS ring buffer descriptors with streamout buffer descriptorsMichel Dänzer2014-01-295-84/+115
* radeonsi: Enable OpenGL 3.3Michel Dänzer2014-01-291-3/+5
* radeonsi: Geometry shader micro-optimizationsMichel Dänzer2014-01-291-12/+10
* radeonsi: We don't support indirect addressing of geometry shader inputsMichel Dänzer2014-01-291-0/+4
* radeonsi: Pass VS resource descriptors to the HW ES shader stage as wellMichel Dänzer2014-01-296-34/+58
* radeonsi: Fix streamout from geometry shaderMichel Dänzer2014-01-291-10/+27
* radeonsi: Simplify shader PM4 state handlingMichel Dänzer2014-01-293-61/+21
* radeonsi: Properly match ES outputs to GS inputsMichel Dänzer2014-01-291-5/+16
* radeonsi: Really dump TGSI code before any TGSI->LLVM conversion attemptMichel Dänzer2014-01-291-8/+8
* radeonsi: Also export clip distances with geometry shaderMichel Dänzer2014-01-292-5/+9
* radeonsi: Take GS into account for VS state in more placesMichel Dänzer2014-01-293-2/+14
* radeonsi: Handle adjacency primitivesMichel Dänzer2014-01-291-4/+4
* radeonsi: Handle TGSI_SEMANTIC_PRIMIDMichel Dänzer2014-01-293-2/+16
* radeonsi: Generalize counting of shader parametersMichel Dänzer2014-01-293-38/+48
* radeonsi: Fix handling of geometry shader output vertex IDMichel Dänzer2014-01-291-7/+19
* radeonsi: Initial geometry shader supportMichel Dänzer2014-01-2911-191/+1084
* radeonsi: Refactor shader input / output handling codeMichel Dänzer2014-01-291-218/+268
* r600g,radeonsi: Don't set resource_create in r600_common_screen_init()Tom Stellard2014-01-282-1/+1
* r600g: s/r600_llvm_gpu_string/r600_get_llvm_processor_name/Michel Dänzer2014-01-281-1/+1
* radeonsi: cleanup includes, add missing licenseMarek Olšák2014-01-2812-86/+49
* radeonsi: remove open-coded PS_PARTIAL_FLUSH eventMarek Olšák2014-01-281-5/+3
* radeonsi: move some inline functions from si_pipe.h to si_state.cMarek Olšák2014-01-282-39/+30
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