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* vc4: Split two notions of instructions having side effects.Eric Anholt2015-01-105-4/+15
* vc4: Redo VPM reads as a read file.Eric Anholt2015-01-105-16/+16
* vc4: Fix miscalculation of the VPM space.Eric Anholt2015-01-101-1/+1
* vc4: Pack VPM attr contents according to just the size of the attribute.Eric Anholt2015-01-103-11/+9
* vc4: Restructure color packing as a series of channel replacements.Eric Anholt2015-01-104-49/+60
* vc4: Fix the no-copy-propagating-from-TLB_COLOR_READ check.Eric Anholt2015-01-101-1/+1
* vc4: Move global seqno short-circuiting to vc4_wait_seqno().Eric Anholt2015-01-102-6/+3
* freedreno/ir3: fix pos_regid > max_regRob Clark2015-01-074-41/+121
* freedreno/ir3: start on indirect gpr readsRob Clark2015-01-073-8/+146
* freedreno/ir3: make reg array dynamicRob Clark2015-01-074-13/+50
* freedreno/ir3: simplify RARob Clark2015-01-078-777/+622
* freedreno/ir3: regmask support for relative addrRob Clark2015-01-072-17/+51
* freedreno/ir3: split up ssa_srcRob Clark2015-01-071-23/+34
* freedreno/ir3: drop instr_clone() stuffRob Clark2015-01-072-49/+17
* freedreno/ir3: runtime enable RA debug for DEBUG buildsRob Clark2015-01-071-1/+6
* freedreno/ir3: handle relative addr in ir3_dumpRob Clark2015-01-071-1/+8
* freedreno/ir3: legalize vs unused sam dst componentsRob Clark2015-01-072-2/+9
* freedreno/ir3: hack for old compilerRob Clark2015-01-071-0/+23
* Revert "radeonsi: reduce the size of si_pm4_state"Marek Olšák2015-01-082-3/+12
* radeonsi: Fix crash when destroying si_screenTom Stellard2015-01-071-2/+4
* radeonsi: enable LLVM optimizations that assume no NaNs for non-compute shadersMarek Olšák2015-01-073-4/+12
* radeonsi: emit SURFACE_SYNC lastMarek Olšák2015-01-071-23/+35
* radeonsi: flush all CB/DB caches unconditionally when changing the framebufferMarek Olšák2015-01-071-11/+7
* radeonsi: change TC cache flushing strategy for texturesMarek Olšák2015-01-072-4/+6
* radeonsi: improve and fix streamout flushingMarek Olšák2015-01-073-10/+40
* radeonsi: use TC L2 for CP DMA operations with shader resources on CIKMarek Olšák2015-01-073-10/+39
* radeonsi: use TC L2 for updating descriptors on CIKMarek Olšák2015-01-072-5/+10
* radeonsi: don't use TC L2 for updating descriptors on SIMarek Olšák2015-01-072-2/+14
* radeonsi: only flush the right set of caches for CP DMA operationsMarek Olšák2015-01-079-34/+48
* radeonsi: implement separate ICACHE and KCACHE flush for SIMarek Olšák2015-01-071-9/+17
* radeonsi: add a combined flag for flushing a framebufferMarek Olšák2015-01-073-20/+10
* radeonsi: rename flush flags, split the TC flag into L1 and L2Marek Olšák2015-01-077-91/+109
* r600g,radeonsi: separate cache flush flagsMarek Olšák2015-01-075-26/+39
* r600g: move r6xx-specific streamout flush flagging into r600gMarek Olšák2015-01-072-9/+7
* radeonsi: only set BC_OPTIMIZE_DISABLE when necessaryMarek Olšák2015-01-072-6/+15
* radeonsi: do not define FACE as an ordinary PS inputMarek Olšák2015-01-071-1/+2
* radeonsi: remove flatshade from the shader keyMarek Olšák2015-01-073-7/+7
* radeonsi: remove special handling of TGSI_INTERPOLATE_COLOR in shader codegenMarek Olšák2015-01-071-6/+10
* radeonsi: implement VERTEXID_NOBASE and BASEVERTEX system valuesMarek Olšák2015-01-071-0/+10
* radeonsi: fix VertexID for OpenGLMarek Olšák2015-01-071-2/+5
* radeonsi: clarify a hw bug in shader exportsMarek Olšák2015-01-071-5/+10
* radeonsi: use ordered compares for SSG and face selectionMarek Olšák2015-01-072-3/+3
* radeonsi: remove unused and not useful variablesMarek Olšák2015-01-073-6/+1
* radeonsi: remove init config from statesMarek Olšák2015-01-076-5/+4
* radeonsi: reduce the size of si_pm4_stateMarek Olšák2015-01-072-12/+3
* vc4: Fix scaling W projection of the Z coordinate when there's a Z offset.Eric Anholt2015-01-061-3/+3
* vc4: Fix deletion from the program cache.Eric Anholt2015-01-061-1/+1
* vc4: Skip storing the Z/S contents when it's invalidated.Eric Anholt2015-01-061-0/+11
* radeon/llvm: Use amdgcn triple for SI+ on LLVM >= 3.6Tom Stellard2015-01-064-16/+27
* radeonsi: Cache LLVMTargetMachine object in si_screenTom Stellard2015-01-066-26/+51
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