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* radeonsi: avoid attempting to create CMASK if the tiling mode doesn't have itNicolai Hähnle2017-11-281-0/+2
* radeonsi: check that we don't leak fine.buf referencesNicolai Hähnle2017-11-281-0/+2
* amd/common: sid.h cleanupsNicolai Hähnle2017-11-281-1/+1
* ac: change legacy_surf_level::slice_size to dword unitsMarek Olšák2017-11-278-28/+30
* ac: pack ac_surface betterMarek Olšák2017-11-272-7/+7
* radeonsi: always initialize max_forced_staging_uploadsMarek Olšák2017-11-271-0/+2
* radeonsi: remove an old hack for evergreenMarek Olšák2017-11-271-10/+0
* radeonsi: set COMPUTE_RESOURCE_LIMITS.FORCE_SIMD_DIST when profitableMarek Olšák2017-11-271-1/+16
* r600/eg: dump event type in dumpsDave Airlie2017-11-271-0/+1
* nouveau/compiler: Allow to omit line numbers when printing instructionsTobias Klausmann2017-11-265-4/+13
* radeonsi: try flushing unflushed fences in si_fence_finish even when timeout ...Nicolai Hähnle2017-11-261-3/+3
* nv50/ir: move LateAlgebraicOpt to the very endIlia Mirkin2017-11-261-1/+1
* nv50/ir: when merging immediates/consts, load directlyIlia Mirkin2017-11-261-1/+21
* nv50/ir: add optimization for modulo by a non-power-of-2 valueIlia Mirkin2017-11-261-0/+15
* nv50/ir: optimize signed integer modulo by pow-of-2Ilia Mirkin2017-11-252-10/+29
* freedreno/a4xx: add ARB_framebuffer_no_attachments supportIlia Mirkin2017-11-252-1/+6
* freedreno/a4xx: add indirect draw supportIlia Mirkin2017-11-252-0/+33
* freedreno: regenerate pm4 header, adjust code for new namesIlia Mirkin2017-11-253-114/+171
* freedreno/a4xx: add stencil texturing supportIlia Mirkin2017-11-253-12/+35
* freedreno/ir3: add a pass to lower tg4 to txl, enable gather on a4xxIlia Mirkin2017-11-257-3/+151
* radeonsi: expose all CB performance counters on StoneyMarek Olšák2017-11-251-1/+1
* radeonsi: handle imported textures with DCC robustlyMarek Olšák2017-11-251-1/+1
* radeonsi: fix a typo in creating monolithic ES-GSMarek Olšák2017-11-251-1/+1
* radeonsi: don't write undefined output channels to LDS in LSMarek Olšák2017-11-251-0/+3
* radeonsi: use ac.lds for shared memoryMarek Olšák2017-11-253-5/+3
* radeonsi: do 64-bit LDS loads recursivelyMarek Olšák2017-11-251-7/+9
* etnaviv: Emit vertex buffers consecutivelyWladimir J. van der Laan2017-11-231-4/+4
* r600: set DX10_CLAMP for compute shader tooRoland Scheidegger2017-11-231-2/+3
* r600/shader: Fix all warnings issed with "-Wall -Wextra"Gert Wollny2017-11-221-31/+36
* r600: Emit EOP for more CF instruction typesGert Wollny2017-11-224-7/+16
* broadcom/vc5: Fix BASE_LEVEL handling with txl.Eric Anholt2017-11-221-0/+4
* broadcom/vc5: Fix array texture layer count setup.Eric Anholt2017-11-221-1/+6
* broadcom/vc5: Don't increment primitive queries while they're paused.Eric Anholt2017-11-221-1/+3
* broadcom/vc5: Fix incorrect padding of TF outputs.Eric Anholt2017-11-221-0/+2
* broadcom/vc5: Fix UIF surface size setup for ARB_fbo's mismatched sizes.Eric Anholt2017-11-221-2/+23
* etnaviv: Put HALTI level in specsWladimir J. van der Laan2017-11-222-0/+23
* etnaviv: Const-correctness etnaviv_emit.hWladimir J. van der Laan2017-11-221-1/+1
* llvmpipe: fix snorm blendingRoland Scheidegger2017-11-212-28/+159
* r600: add cull distance supportDave Airlie2017-11-216-6/+24
* broadcom/vc5: Align 1D texture miplevels to 64b.Eric Anholt2017-11-201-0/+2
* broadcom/vc5: Clamp min lod to the last level.Eric Anholt2017-11-201-2/+3
* broadcom/vc5: Increase simulator memory for tex-miplevel-selection.Eric Anholt2017-11-201-1/+1
* swr/rast: Repair simd8 frontend code rotTim Rowley2017-11-201-1/+1
* swr/rast: Implement AVX-512 GATHERPS in SIMD16 fetch shaderTim Rowley2017-11-204-29/+220
* swr/rast: Simplify GATHER* jit builder apiTim Rowley2017-11-204-48/+48
* swr/rast: Add alignment to transpose targetsTim Rowley2017-11-201-8/+8
* swr/rast: Cache eventmanagerTim Rowley2017-11-203-0/+9
* swr/rast: Enable AVX-512 targets in the jitterTim Rowley2017-11-202-10/+0
* swr/rast: Points with clipdistance can't go through simplepoints pathTim Rowley2017-11-201-1/+2
* swr/rast: Code style change (NFC)Tim Rowley2017-11-201-2/+7
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