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* radeonsi: don't forget to update scratch relocations for LS, HS, ES shadersMarek Olšák2015-10-071-2/+6
* radeonsi: skip drawing if updating the scratch buffer failsMarek Olšák2015-10-071-14/+49
* radeonsi: skip drawing if PS fails to compile or uploadMarek Olšák2015-10-071-12/+3
* radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or uploadMarek Olšák2015-10-071-7/+23
* radeonsi: handle fixed-func TCS shader create failureMarek Olšák2015-10-071-2/+5
* radeonsi: handle shader precompile failuresMarek Olšák2015-10-071-1/+6
* radeonsi: skip drawing if GS ring allocations failMarek Olšák2015-10-071-1/+16
* radeonsi: skip drawing if the tess factor ring allocation failsMarek Olšák2015-10-073-5/+18
* radeonsi: add malloc fail paths to si_create_shader_stateMarek Olšák2015-10-071-0/+8
* radeonsi: report alloc failure from si_shader_binary_readMarek Olšák2015-10-071-1/+4
* gallium/radeon: add a fail path for depth MSAA texture readbackMarek Olšák2015-10-071-0/+5
* gallium/radeon: handle buffer alloc failures in r600_draw_rectangleMarek Olšák2015-10-071-0/+3
* gallium/radeon: handle buffer_map staging buffer failures betterMarek Olšák2015-10-071-4/+3
* radeonsi: handle constant buffer alloc failuresMarek Olšák2015-10-071-1/+7
* radeonsi: handle index buffer alloc failuresMarek Olšák2015-10-071-0/+6
* radeonsi: load fmask ptr relative to the resources arrayIlia Mirkin2015-09-231-1/+1
* nv50,nvc0: flush texture cache in presence of coherent bufsIlia Mirkin2015-09-232-0/+39
* nv50,nvc0: detect underlying resource changes and update ticIlia Mirkin2015-09-232-0/+43
* freedreno/a3xx: fix blending of L8 formatIlia Mirkin2015-09-231-0/+2
* nv50, nvc0: fix max texture buffer size to 128M elementsIlia Mirkin2015-09-232-2/+2
* r600g: use pipe_resource::width0 instead pb_buffer::sizeMarek Olšák2015-09-112-6/+6
* radeonsi: enable VGPR spilling on VIMarek Olšák2015-09-111-3/+1
* nv50/ir: don't fold immediate into mad if registers are too highIlia Mirkin2015-09-111-0/+4
* nv50/ir: fix emission of 8-byte wide interp instructionIlia Mirkin2015-09-111-5/+6
* nv50/ir: r63 is only 0 if we are using less than 63 registersIlia Mirkin2015-09-111-1/+4
* nv50/ir: make edge splitting fix up phi node sourcesIlia Mirkin2015-09-111-13/+77
* nvc0: remove BGRA4 format supportIlia Mirkin2015-09-111-0/+2
* nvc0: keep track of cb bindings per buffer, use for upload settingsIlia Mirkin2015-09-117-12/+58
* nv30: Disable msaa unless requested from the env by NV30_MAX_MSAAHans de Goede2015-09-112-1/+21
* nv30: Fix color resolving for nv3x cardsHans de Goede2015-09-111-1/+37
* nouveau: android: add space before PRIx64 macroMauro Rossi2015-09-111-1/+1
* r600: don't use shader key without verifying shader type (v2)Dave Airlie2015-09-111-7/+12
* nvc0: always emit a full shader colormaskIlia Mirkin2015-09-111-1/+1
* nv30: Fix max width / height checks in nv30 sifm codeHans de Goede2015-09-111-2/+2
* nouveau: don't mark full range as used on unmap with explicit flushIlia Mirkin2015-09-061-5/+7
* nv50: avoid using inline vertex data submit when gl_VertexID is usedIlia Mirkin2015-09-064-2/+14
* nv50: don't flush vertex arrays when index buffer changesIlia Mirkin2015-09-061-4/+0
* nv50: rebind bo to bufctx when invalidating idxbuf storageIlia Mirkin2015-09-061-1/+5
* nv50: clear buffer status on all vertex bufs, not just the first oneIlia Mirkin2015-09-061-1/+0
* nv50: fix drawing from tfb, direct-to-pushbuf submitsIlia Mirkin2015-09-064-14/+15
* nv30: Implement color resolve for msaaHans de Goede2015-09-062-14/+8
* nv30: Fix creation of scanout buffersHans de Goede2015-09-061-0/+10
* vc4: Initialize pack field of qreg to 0 in qir_get_tempBoyan Ding2015-09-061-0/+1
* radeonsi: fix memory usage checking for big IBsMarek Olšák2015-09-061-8/+9
* radeonsi: set all 16 viewport Z bounds for GL 4.1Marek Olšák2015-09-061-2/+6
* radeonsi: fix a Unigine Heaven hang when drirc is missingMarek Olšák2015-09-064-1/+28
* r600g: fix calculation for gpr allocationDave Airlie2015-09-061-1/+1
* r600/sb: update last_cf for finalize if.Dave Airlie2015-09-061-0/+3
* freedreno/a4xx: formats updateRob Clark2015-09-011-5/+5
* freedreno: update generated headersRob Clark2015-09-015-5/+8
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