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* gallium: Add a pipe cap for whether primitive restart works for patches.Kenneth Graunke2016-05-2315-0/+15
| | | | | | | | | | | | | | | Some hardware supports primitive restart on patch primitives, and other hardware does not. Modern GL and ES include a query for this feature; adding a capability bit will allow us to answer it. As far as I know, AMD hardware does not support this feature, while NVIDIA and Intel hardware does. However, most Gallium drivers do not appear to support tessellation shaders yet. So, I've enabled it for nvc0 and disabled it everywhere else. Signed-off-by: Kenneth Graunke <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* freedreno/ir3: disable cp for indirect src'sRob Clark2016-05-231-0/+9
| | | | | | | | | | | | The variable-indexing tests always had a few random fails, which I usually couldn't reproduce when running tests manually. Somehow recently this got a lot worse. I ported a couple of the shaders to GLES to see what blob does, and it also seems to be avoiding to cp indirect srcs. So I guess indirect w/ instructions other than cat1 (mov) are not totally reliable. Let's just switch that off until this is better understood. Signed-off-by: Rob Clark <[email protected]>
* nvc0: do not invalidate compute constbufs on KeplerSamuel Pitoiset2016-05-231-4/+6
| | | | | | | | Constbufs are only aliased on Fermi and this will reduce the number of flushes when we switch between 3d and compute. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv30: don't assert when running out of registersIlia Mirkin2016-05-222-3/+1
| | | | | | | | | | This happens with dEQP tests. The code doesn't at all protect against this condition, so while unhandled, this is an expected situation. Also avoid using more than the first 16 registers for nv3x vertex programs. Signed-off-by: Ilia Mirkin <[email protected]>
* nouveau: allow allocating non-object-backed buffersIlia Mirkin2016-05-221-4/+1
| | | | | | | On nv30, for example, there is no hardware index buffer support. So all of those will be created entirely in user memory. Signed-off-by: Ilia Mirkin <[email protected]>
* llvm/softpipe: Enable cull_distance as draw supports it.Tobias Klausmann2016-05-232-2/+3
| | | | | | Reviewed-by: Roland Scheidegger <[email protected]> Signed-off-by: Tobias Klausmann <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* virgl: remove unused state_tracker/graw.h includeEmil Velikov2016-05-231-1/+0
| | | | | | Cc: Dave Airlie <[email protected]> Signed-off-by: Emil Velikov <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* nvc0/ir: fix indirect access for imagesSamuel Pitoiset2016-05-221-8/+14
| | | | | | | | | | | | When the array doesn't start at 0 we need to account for su->tex.r. While we are at it, make sure to avoid out of bounds access by masking the index. This fixes GL45-CTS.shading_language_420pack.binding_image_array. Signed-off-by: Samuel Pitoiset <[email protected]> Reported-by: Dave Airlie <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv30: reset the stencil mask when fast-clearingIlia Mirkin2016-05-221-1/+6
| | | | | | | | Apparently the stencil mask applies to clears on nv30/nv40. Reset it to 0xff before doing a stencil clear. This fixes gl-1.0-readpixsanity and a number of other piglit tests. Signed-off-by: Ilia Mirkin <[email protected]>
* nv30,nv50: add PIPE_SHADER_CAP_PREFERRED_IR supportIlia Mirkin2016-05-222-6/+12
| | | | | | The mesa state tracker has recently started to query this. Signed-off-by: Ilia Mirkin <[email protected]>
* nvc0: fix setting of tess_mode in various situationsIlia Mirkin2016-05-221-4/+14
| | | | | | | | This fixes a lot of INVALID_VALUE errors reported by the card when running dEQP tests. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nv50/ir: fix prog info initIlia Mirkin2016-05-221-3/+1
| | | | | | | | | Left over from the pre-mainline tess support. Adapt to use the new defines. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0/ir: return 0 for gl_TessCoord.z for non-triangles modesIlia Mirkin2016-05-221-0/+4
| | | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0: expose GLSL version 420 on GF100Samuel Pitoiset2016-05-211-1/+1
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: enable ARB_shader_image_load_store on GF100Samuel Pitoiset2016-05-211-0/+3
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add a lowering pass for surfaces on FermiSamuel Pitoiset2016-05-212-0/+117
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add emission for SULDB and SUSTxSamuel Pitoiset2016-05-211-2/+44
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add emission for OP_SULEASamuel Pitoiset2016-05-211-0/+58
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: fix tex constraints for surface coords on FermiSamuel Pitoiset2016-05-211-0/+6
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: use moveSources to condense sourcesIlia Mirkin2016-05-211-6/+1
| | | | | | | This makes sure that rIndirectSrc and other things stay updated. Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nvc0: bind images on fragment and compute shaders for FermiSamuel Pitoiset2016-05-214-7/+196
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: don't check the format for surface stores on KeplerSamuel Pitoiset2016-05-211-8/+7
| | | | | | | | | | | | Initially to make sure the format doesn't mismatch and won't produce out-of-bounds access, we checked that both formats have exactly the same number of bytes, but this should not be checked for type stores. This fixes serious rendering issues in the UE4 demos (tested with realistic and reflections). Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: fix a comment in canDualIssue()Samuel Pitoiset2016-05-211-1/+1
| | | | | | | Trivial. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: fix SUSTx constraints on KeplerSamuel Pitoiset2016-05-211-3/+1
| | | | | | | | | | | | | To prevent out-of-bounds access and format mismatch we add a predicate on sustp, but we have to account for it when the sources are condensed because a predicate is a source. Using the range 3:6 will only condense the input data and it's always the case. This also fixes constraints when an indirect access is used. This ensures that sources are correctly aligned. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* virgl: handle cull distance cap.Dave Airlie2016-05-211-0/+1
| | | | Signed-off-by: Dave Airlie <[email protected]>
* virgl: Add missing texture transfer_inline_writeRob Herring2016-05-211-1/+1
| | | | | | | | | | | | | transfer_inline_write cannot be NULL and the virgl renderer doesn't support inline writes for textures, so add the default version. This fixes a crash in st_TexSubImage since commit fb9fe352ea41 ("st/mesa: use transfer_inline_write for memcpy TexSubImage path"). Cc: Marek Olšák <[email protected]> Cc: Dave Airlie <[email protected]> Signed-off-by: Rob Herring <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* freedreno/ir3: need to lower fmod tooRob Clark2016-05-201-0/+2
| | | | Signed-off-by: Rob Clark <[email protected]>
* nvc0: account for shader-allocated local memory needsIlia Mirkin2016-05-192-2/+2
| | | | | Signed-off-by: Ilia Mirkin <[email protected]> Reviewed-by: Samuel Pitoiset <[email protected]>
* nv50/ir: treat addresses as localIlia Mirkin2016-05-191-1/+1
| | | | | | | | | Address registers are always loaded right before use. Don't treat them as "global", which will cause them to be put into the function's linkage, and will make the register allocator hold onto that register until the end of the function. Signed-off-by: Ilia Mirkin <[email protected]>
* swr: [rasterizer] utility functions for shared libsTim Rowley2016-05-192-2/+64
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] fix assert in AVX implementation of MASKLOADDTim Rowley2016-05-191-2/+7
| | | | | | llvm changed the mask type to vector of ints with 3.8. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] apply KNOB_TOSS_DRAW to more functionsTim Rowley2016-05-191-0/+20
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] add instancing to non-gather fetch pathTim Rowley2016-05-191-5/+37
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] move MultisampleTrait static from header to cppTim Rowley2016-05-193-4/+7
| | | | | | | Move a MultisampleTrait static from header to cpp as clang seemed to get confused with some specializations in the header vs some in cpp. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] clang override for _mm_undefined*Tim Rowley2016-05-191-1/+1
| | | | | | Not supported in older xcode versions. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] add OSX to unix portability sectionsTim Rowley2016-05-192-2/+9
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer] rename _aligned_malloc to AlignedMallocTim Rowley2016-05-198-25/+40
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer jitter] rename MEMCPY function to MEMCOPYTim Rowley2016-05-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] guard definition of __cdecl/__stdcallTim Rowley2016-05-191-0/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] include cstddef for offsetofTim Rowley2016-05-191-0/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] removed tabs that snuck inTim Rowley2016-05-191-4/+4
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] code style cleanupTim Rowley2016-05-191-22/+24
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] add dummy code for cygwin buildTim Rowley2016-05-191-0/+14
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] move variable query outside loopTim Rowley2016-05-191-1/+2
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] utility function for getenvTim Rowley2016-05-191-0/+17
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] portable threadviz bucketsTim Rowley2016-05-191-2/+11
| | | | | | Output with slashes instead of backslashes for unix/linux. Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer common] foreground win32 assert dialogTim Rowley2016-05-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: [rasterizer core] use parens to disambiguate operator precedenceTim Rowley2016-05-191-1/+1
| | | | Reviewed-by: Bruce Cherniak <[email protected]>
* swr: standardize linkage and check for unresolved symbolsTim Rowley2016-05-191-1/+7
| | | | Acked-by: Emil Velikov <[email protected]>
* swr: fix swr linkage so that static llvm worksTim Rowley2016-05-191-1/+10
| | | | Reviewed-by: Emil Velikov <[email protected]>
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