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* nvc0: support for GP10BAlexandre Courbot2017-05-301-0/+1
| | | | | | | | GP10B uses the same 3D class as GP100. Signed-off-by: Alexandre Courbot <[email protected]> Acked-by: Samuel Pitoiset <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* etnaviv: Don't try to use the index buffer if size is zeroTomeu Vizoso2017-05-301-11/+13
| | | | | | | | | | | | | If info->index_size is zero, info->index will point to uninitialized memory. Fatal signal 11 (SIGSEGV), code 2, fault addr 0xab5d07a3 in tid 20456 (surfaceflinger) lst: Remove useless indexbuf conditional in the index_size != 0 case. Fixes: 330d0607ed60 ("gallium: remove pipe_index_buffer and set_index_buffer") Signed-off-by: Tomeu Vizoso <[email protected]> Reviewed-by: Lucas Stach <[email protected]>
* radeonsi: use ac_build_buffer_load for shader buffer loadsMarek Olšák2017-05-291-22/+21
| | | | | | and document why we can't use SMEM yet. Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: move building llvm.SI.load.const into ac_build_buffer_loadMarek Olšák2017-05-291-13/+10
| | | | Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: rename readonly_memory -> can_speculateMarek Olšák2017-05-292-14/+14
| | | | | | | This is more accurate. Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* radeonsi: fix a crash in si_destroy_context if we fail earlyMarek Olšák2017-05-291-1/+2
| | | | | Reviewed-by: Samuel Pitoiset <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* freedreno: fix fence creation fail if no renderingRob Clark2017-05-281-13/+1
| | | | | | | | | Android tries to create a FENCE_FD fence without any rendering. And then falls over when that fails. So just always create an initial batch. Fixes: e4ad8695 ("freedreno: fix crash when flush() but no rendering") Signed-off-by: Rob Clark <[email protected]>
* radeonsi: drop useless memcmp() check in si_set_blend_color()Samuel Pitoiset2017-05-271-3/+0
| | | | | | | | | cso_set_blend_color() already checks if the old state is different. Only Nine uses pipe::set_blend_color() directly but I guess it should use the cache too. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* llvmpipe: add LP_NEW_GS flag for updating vertex infoRoland Scheidegger2017-05-271-0/+1
| | | | | | | | | | The vertex information we compute here is really dependent on the last stage before FS. It just happened to work most of the time because new GS tend to come with new VS and/or FS... (The LP_NEW_GS flag was previously set but never used.) Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* svga: document some incorrect VGPU10 shader translation issuesBrian Paul2017-05-261-0/+9
| | | | | | | | | We have a few mistakes in our shader translation code, but the virtual GPU is forgiving. Reviewed-by: Michal Krol <[email protected]> Reviewed-by: Neha Bhende<[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* nouveau: drop Android 4.4 and earlier supportRob Herring2017-05-252-33/+3
| | | | | | | | | Support for Android 4.4 and earlier has already been removed from mesa. Remove this remaining piece from nouveau, too. Reviewed-by: Ilia Mirkin <[email protected]> Reviewed-by: Emil Velikov <[email protected]> Signed-off-by: Rob Herring <[email protected]>
* radeonsi: enable vcn decodeLeo Liu2017-05-251-1/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon: rename has_uvd info to has_hw_decodeLeo Liu2017-05-253-4/+4
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for mpeg4 codecLeo Liu2017-05-251-0/+51
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for mpeg2 codecLeo Liu2017-05-251-0/+66
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for vc1 codecLeo Liu2017-05-251-0/+72
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message for hevc codecLeo Liu2017-05-251-0/+225
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message decode for avc codecLeo Liu2017-05-251-4/+193
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message feedbackLeo Liu2017-05-251-1/+5
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message destroyLeo Liu2017-05-251-1/+10
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add decode message createLeo Liu2017-05-251-1/+21
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add common decode partLeo Liu2017-05-253-0/+675
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/winsys: add vcn dec ring typeLeo Liu2017-05-251-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/winsys: add uvd enc ring typeLeo Liu2017-05-251-0/+1
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* radeon/vcn: add vcn decode interfaceLeo Liu2017-05-252-0/+502
| | | | | Signed-off-by: Leo Liu <[email protected]> Reviewed-by: Christian König <[email protected]>
* svga: init svga_screen::swc_mutex with mtx_recursiveBrian Paul2017-05-242-1/+4
| | | | | | | | | | | | | | | | | | If the SVGA3D_BindGBSurface() call in svga_buffer_hw_storage_unmap() fails, we'll flush and that might involve unmapping other buffers. That leads to a recursive lock on svga_screen::swc_mutex and causes a deadlock. Fix this by initializing the mutex with mtx_recursive. Note that this only happened on Linux, not Windows. On Windows, the mutex functions are implemented with Win32 critical sections which support recursive locking. Also add a comment about this. Fixes VMware bug 1831549 (Unigine Tropics demo freeze on Linux). Reviewed-by: Thomas Hellstrom <[email protected]> Reviewed-by: Neha Bhende<[email protected]>
* svga: move logging initialization code into new functionBrian Paul2017-05-242-24/+31
| | | | | | Plus a few other minor clean-ups. Reviewed-by: Sinclair Yeh <[email protected]>
* svga: init local vars to silence uninitialized use warningsBrian Paul2017-05-241-3/+3
| | | | Reviewed-by: Sinclair Yeh <[email protected]>
* svga: log the process command line to the vmware.log fileBrian Paul2017-05-241-0/+16
| | | | | | | | | This is useful for Piglit when thousands of tests are run and we want to determine which test triggered a device error. v2: only log command line info if the new SVGA_EXTRA_LOGGING env var is set Reviewed-by: Charmaine Lee <[email protected]>
* svga: Limit svga message capability to newer compilersSinclair Yeh2017-05-241-4/+14
| | | | | | | | | | | The assembly code used by the SVGA message feature doesn't build properly with older compilers, so limit it to only gcc 5.3.0 and newer. Also modified the stubs to avoid "unused variable" warnings. Reviewed-by: Charmaine Lee <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* svga: Fix MSVC build.Brian Paul2017-05-241-2/+32
| | | | | | This let us compile the code with MSVC, but it no-ops the log function. Reviewed-by: Jose Fonseca <[email protected]>
* svga: Add the ability to log messages to vmware.log on the host.Sinclair Yeh2017-05-245-0/+471
| | | | | | | | For now this capability only exists in the SVGA driver but can be exported later if other modules, e.g. winsys, wants to use it for logging. Reviewed-by: Brian Paul <[email protected]>
* gallium/radeon: pipe AMDGPU_INFO_NUM_VRAM_CPU_PAGE_FAULTS into gallium HUDMarek Olšák2017-05-233-2/+8
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* freedreno/ir3: switch to NIR by defaultRob Clark2017-05-232-16/+2
| | | | | | | | | | | Now that we lower vars to regs, we no longer regress for anything that does complex dereferences. (With tgsi, derefers are already lowered before tgsi_to_nir, but not with glsl_to_nir.) In fact it actually fixes a few things to bypass tgsi. So make NIR the default (finally!) Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: lower arrays to regsRob Clark2017-05-232-150/+185
| | | | | | | | | | | Instead of using load/store_var intrinsics, which can have complex derefs in the case of multi-dimensional arrays, lower these to regs and handle the direct/indirect loads in get_src() and stores in put_dst(). This should let us switch to using nir by default. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add put_dst()Rob Clark2017-05-231-0/+24
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: code-motionRob Clark2017-05-231-55/+55
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: fix cmdline compilerRob Clark2017-05-231-2/+0
| | | | | | | | standalone_compiler_cleanup() frees the glsl types, among other things, so it needs to come after nir->ir3. But since we exit after dumping the disassembly, it is easier to just not call it at all. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add missing nir_opt_copy_prop_vars() passRob Clark2017-05-231-0/+1
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: need different compiler options for a5xxRob Clark2017-05-234-5/+28
| | | | | | vertex_id_zero_based differs.. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: remove copapasta from a4xxRob Clark2017-05-231-2/+1
| | | | | | | Won't ever hit this w/ a420 gpu, so this is dead code. Need to get astc working to know whether to rip this out entirely or not. Signed-off-by: Rob Clark <[email protected]>
* freedreno: only support SSBOs with nirRob Clark2017-05-231-0/+3
| | | | | | | tgsi_to_nir does not support them. Note that compute shaders already force nir. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: add some missing texture formatsRob Clark2017-05-231-51/+51
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a5xx: provoking vertexRob Clark2017-05-236-44/+40
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno: update generated headersRob Clark2017-05-236-55/+64
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeon: pass flags that can change shaders to disk_cache_create()Timothy Arceri2017-05-231-1/+2
| | | | | | | | | I wasn't sure if I should filter the flags so that we only use flags that actually change the shader output. To avoid manual updates we just pass in everything for now. Reviewed-by: Eduardo Lima Mitev <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* util/disk_cache: add new driver_flags param to cache keysTimothy Arceri2017-05-232-2/+2
| | | | | | | | | This will be used for things such as adding driver specific environment variables to the key. Allowing us to set environment vars that change the shader and not have the driver ignore them if it finds existing shaders in the cache. Reviewed-by: Eduardo Lima Mitev <[email protected]>
* gallium/radeon: add a query for monitoring Gallium thread loadMarek Olšák2017-05-222-0/+13
| | | | Reviewed-by: Samuel Pitoiset <[email protected]>
* radeonsi/gfx9: compile shaders with +xnackMarek Olšák2017-05-221-6/+7
| | | | | | | so that LLVM doesn't allocate SGPRs where XNACK is. Cc: 17.1 <[email protected]> Reviewed-by: Nicolai Hähnle <[email protected]>
* vc4: Remove dead code in vc4_dump_surface_msaa()Rhys Kidd2017-05-221-6/+0
| | | | | | | | | Coverity caught the use of dead code copy-paste for found_colors[] and num_found_colors. CID: 1341850 Signed-off-by: Rhys Kidd <[email protected]> Reviewed-by: Eric Anholt <[email protected]>