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* r600: enable ARB_enhanced_layoutsDave Airlie2018-01-191-1/+1
* vc5: add missing files to the tarballEmil Velikov2018-01-181-0/+5
* r600/sb: add lds related peepholes.Dave Airlie2018-01-181-1/+8
* r600/sb: use different stacks for tracking lds and queue usage.Dave Airlie2018-01-182-3/+24
* r600/sb: schedule LDS ops in appropriate places.Dave Airlie2018-01-182-0/+7
* r600/sb: hit the scheduler with a big hammer to avoid lds splits.Dave Airlie2018-01-181-0/+3
* r600/sb: adding lds oq tracking to the schedulerDave Airlie2018-01-182-3/+15
* r600/sb: add gcm support to avoid clause between lds read/queue readDave Airlie2018-01-182-2/+17
* r600/sb: handle lds special dest registers.Dave Airlie2018-01-182-2/+2
* r600/sb: handle LDS operations in folding.Dave Airlie2018-01-181-0/+11
* r600/sb: add finalising for lds output queue special values.Dave Airlie2018-01-181-0/+12
* r600/sb: add initial support for parsing lds operations.Dave Airlie2018-01-181-2/+50
* r600/sb: disable if conversion for hsDave Airlie2018-01-181-1/+1
* r600/sb: lds ops have no dst register.Dave Airlie2018-01-181-1/+1
* r600/sb: introduce special register values for lds support.Dave Airlie2018-01-183-1/+33
* r600/sb: update last_cf if alu is the last clauseDave Airlie2018-01-181-0/+1
* r600/sb: start adding GDS supportDave Airlie2018-01-1813-13/+123
* r600/sb: add tess/compute initial state registers.Dave Airlie2018-01-181-1/+4
* r600/sb: fix a bug emitting ar load from a constant.Dave Airlie2018-01-181-0/+3
* r600/shader: only emit add instruction if param has a value.Dave Airlie2018-01-181-6/+8
* r600: emit 0 gds_op for tf write.Dave Airlie2018-01-181-2/+3
* r600: add support for ARB_shader_clock.Dave Airlie2018-01-183-5/+29
* gallium: remove PIPE_CAP_USER_CONSTANT_BUFFERSMarek Olšák2018-01-1716-21/+0
* gallium: remove PIPE_CAP_TEXTURE_SHADOW_MAPMarek Olšák2018-01-1716-20/+0
* gallium: remove PIPE_CAP_TWO_SIDED_STENCILMarek Olšák2018-01-1716-20/+0
* svga: add num-commands-per-draw HUD queryBrian Paul2018-01-176-0/+24
* meson: add llvm dependency for swr buildGeorge Kyriazis2018-01-171-0/+1
* radeonsi: bump glsl version to 450 for nir backendTimothy Arceri2018-01-181-6/+1
* radeonsi/nir: add some missing tcs bits to the nir scan passTimothy Arceri2018-01-181-0/+14
* ac/radeonsi: add tcs load outputs supportTimothy Arceri2018-01-182-16/+29
* radeon: remove unneeded semicolonsGrazvydas Ignotas2018-01-171-3/+3
* ac: import lp_create_builder() from gallivmSamuel Pitoiset2018-01-161-4/+4
* radeon/vcn: update quantiser matrices only when requestedIndrajit Das2018-01-161-6/+11
* radeon/uvd: update quantiser matrices only when requestedIndrajit Das2018-01-161-6/+11
* r600/shader: Initialize max_driver_temp_used correctly for the first timeGert Wollny2018-01-151-0/+1
* freedreno/ir3: "soft" depth scheduling for SFU instructionsRob Clark2018-01-141-9/+21
* freedreno/a5xx: work around SWAP vs TILE_MODE constraintRob Clark2018-01-141-0/+20
* freedreno/a5xx: texture tilingRob Clark2018-01-1416-25/+339
* freedreno: update generated headersRob Clark2018-01-146-26/+35
* freedreno: add screen->setup_slices() for tex layoutRob Clark2018-01-143-19/+43
* r300g: remove double assignmentGrazvydas Ignotas2018-01-141-1/+0
* ac: fix build error in si_shaderMauro Rossi2018-01-131-1/+1
* radv/radeonsi/nir: lower 64bit flrpTimothy Arceri2018-01-131-0/+1
* broadcom/vc5: Fix up channel swizzling for textures on 4.x.Eric Anholt2018-01-121-2/+5
* broadcom/vc5: Port the draw-time state emission to V3D 4.1.Eric Anholt2018-01-127-27/+76
* broadcom/vc5: Rename V3D 3.x Flat Shade Action to match v4.x naming.Eric Anholt2018-01-121-5/+5
* broadcom/vc5: Update pixel center setup for V3D 4.x.Eric Anholt2018-01-121-2/+12
* broadcom/vc5: Print the buffer name in simulator overflow checks.Eric Anholt2018-01-121-2/+4
* broadcom/vc5: Update state setup for V3D 4.1.Eric Anholt2018-01-127-14/+206
* broadcom/vc5: Set up depth formats for V3D 4.x.Eric Anholt2018-01-121-1/+12
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