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* llvmpipe: honor the render_condition_enable bit in blits.Roland Scheidegger2014-05-311-0/+3
* svga: use svga_shader_too_large() in compile_vs()Brian Paul2014-05-311-8/+36
* svga: use svga_shader_too_large() in compile_fs()Brian Paul2014-05-311-3/+1
* svga: added svga_shader_too_large() helperBrian Paul2014-05-311-0/+21
* i915g: Support B5G5R5A1 render targets and texturesStéphane Marchesin2014-05-281-0/+2
* i915g: Support R4G4B4A4 render targets and texturesStéphane Marchesin2014-05-281-0/+2
* i915g: Fix copy region codeStéphane Marchesin2014-05-281-34/+14
* nvc0/ir: use SM35 ISA with GK20AAlexandre Courbot2014-05-273-7/+12
* nvc0: add GK20A 3D classAlexandre Courbot2014-05-272-1/+9
* radeon/vce: implement non-referenced framesLeo Liu2014-05-272-3/+5
* i915g: Fix shader disasm codeStéphane Marchesin2014-05-261-1/+0
* i915g: Fallback to sw for npot copiesStéphane Marchesin2014-05-261-2/+3
* i915g: handle more formats in copyStéphane Marchesin2014-05-263-11/+91
* nvc0: implement clear_bufferTobias Klausmann2014-05-261-0/+141
* nvc0: revert mistaken logic to collapse color outputs to the beginningIlia Mirkin2014-05-261-9/+4
* freedreno/a3xx: texture fixesRob Clark2014-05-261-1/+3
* freedreno: update generated headersRob Clark2014-05-264-5/+7
* freedreno: few caps fixesRob Clark2014-05-262-4/+8
* nv50: count wrapped textures towards the tex_obj countJoakim Sindholt2014-05-231-0/+2
* nvc0: assert that we have vertex elements stateChristoph Bumiller2014-05-231-0/+1
* nvc0: use PRIxPTR for sizeof()Christoph Bumiller2014-05-231-1/+1
* nv50,nvc0: allow 15,16,30 bpp display formatsChristoph Bumiller2014-05-231-4/+4
* nv50,nvc0: handle guard band definesChristoph Bumiller2014-05-232-4/+16
* nv50/ir/tgsi: optimize KILChristoph Bumiller2014-05-231-0/+5
* nv50/ir: fix lowering of predicated instructions (without defs)Christoph Bumiller2014-05-231-1/+4
* nv50/ir/opt: fix constant folding with saturate modifierChristoph Bumiller2014-05-231-1/+3
* nv50/ir/tgsi: TGSI_OPCODE_POW replicates its resultChristoph Bumiller2014-05-231-1/+5
* nv50,nvc0: set constbufs dirty on pipe context switchChristoph Bumiller2014-05-232-0/+5
* nv50: setup scissors on clear_render_target/depth_stencilChristoph Bumiller2014-05-231-2/+18
* nv50,nvc0: always pull out bufctx on context destructionChristoph Bumiller2014-05-232-9/+7
* freedreno/a3xx: fix blend opcodeRob Clark2014-05-218-54/+83
* freedreno/a3xx: fix depth/stencil gmem restoreRob Clark2014-05-211-1/+1
* freedreno/a3xx: fix depth/stencil GMEM positioningRob Clark2014-05-211-12/+18
* freedreno: update generated headersRob Clark2014-05-214-5/+5
* freedreno: use OUT_RELOCW when buffer is writtenRob Clark2014-05-211-4/+4
* rbug: add missing pipe->blit() entrypointRob Clark2014-05-211-0/+21
* nv50,nvc0: fix 3d blits with mipmap levelsIlia Mirkin2014-05-212-11/+19
* nv50/ir: fix constant folding for OP_MUL subop HIGHIlia Mirkin2014-05-211-4/+43
* nv50/ir: fix s32 x s32 -> high s32 multiply logicIlia Mirkin2014-05-212-11/+82
* freedreno: don't advertise texture arrays for nowRob Clark2014-05-201-1/+1
* freedreno/a3xx: shadow sampler supportRob Clark2014-05-192-3/+46
* freedreno/a3xx/compiler: refactor trans_samp()Rob Clark2014-05-191-47/+90
* freedreno: update generated headersRob Clark2014-05-194-4/+10
* llvmpipe: do IR counting for shader cache management after optimization.Roland Scheidegger2014-05-191-2/+2
* nv50/ir: fix integer mul lowering for u32 x u32 -> high u32Ilia Mirkin2014-05-181-3/+4
* nv50/ir: make sure that texprep/texquerylod's args get coalescedIlia Mirkin2014-05-181-0/+2
* freedreno/a3xx: use util_format_compose_swizzles()Rob Clark2014-05-181-9/+9
* freedreno/a3xx/compiler: 1D texturesRob Clark2014-05-181-4/+25
* freedreno: fix capsRob Clark2014-05-181-2/+2
* freedreno: fix index buffer offsetRob Clark2014-05-181-1/+1
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