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* nv40: support all 10 texcoordsLuca Barbieri2010-09-043-12/+19
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* nvfx: add missing context initLuca Barbieri2010-09-041-0/+3
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* nvfx: tidy up state_emitLuca Barbieri2010-09-041-76/+84
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* nvfx: support all coord conventions in hardwareLuca Barbieri2010-09-046-5/+41
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* nvfx: add missing pushbuffer space checkLuca Barbieri2010-09-041-0/+2
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* nvfx: support all possible vs constsLuca Barbieri2010-09-041-10/+5
| | | | | | | | We were incorrectly setting a register that limited the range of constants accessible via indirect addressing. Setting it correctly, we can address all the constants the GPU supports.
* nvfx: set magic bit to round NPOT mipmap sizes down and not upLuca Barbieri2010-09-042-0/+6
| | | | Does any API even use rounding-up?
* nvfx: allow nested blitter usage, fixing bug in clearLuca Barbieri2010-09-043-8/+21
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* galahad: do map/unmap counting for resourcesBrian Paul2010-09-032-0/+18
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* nvfx: implement LIT in fpLuca Barbieri2010-09-032-1/+24
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* nvfx: fix division by zero in vp-ignore-inputLuca Barbieri2010-09-031-1/+1
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* nvfx: report correct max lodbiasLuca Barbieri2010-09-031-1/+1
| | | | Fixes piglit lodbias
* nvfx: remove messageLuca Barbieri2010-09-031-13/+0
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* nvfx: support indirect addressing in vpsLuca Barbieri2010-09-034-27/+96
| | | | Negative or huge offsets not yet supported.
* nvfx: fix support for more than 8 texture units (fixes etqw crash)Luca Barbieri2010-09-032-4/+3
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* r600g: fix segfault in state after reworkDave Airlie2010-09-031-2/+2
| | | | probably can improve this a bit.
* r600g: refactor sample states into a reusable struct.Dave Airlie2010-09-032-97/+78
| | | | | | I will not cut-n-paste. I will not cut-n-paste. I will not cut-n-paste.
* r600g: reduce size of r600 context structure to !insaneDave Airlie2010-09-032-3/+29
| | | | Its now about 7.8k, and might actually fit in a cache.
* r600g: add texture border state.Dave Airlie2010-09-032-2/+42
| | | | | | | Okay I finally wrapped my head around what r600_context_state is meant to be, maybe I should just rename all the structs so that have distinct names. I've no idea however why 16 is a good magic number for R600_MAX_RSTATE.
* r600g: deref old driver states for set entry points.Dave Airlie2010-09-031-0/+10
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* r600g: drop r600_bind_state.Dave Airlie2010-09-031-75/+34
| | | | | | | This was another ugly function that really wasn't needed. The 3 calls to it from the gallium api were shorter than it, and all the calls from the set_ functions were pointless.
* r600g: kill r600_context_state functionDave Airlie2010-09-032-96/+63
| | | | | | having some sort of locality of code really matters, just create and setup state at time. Not sure if this is just further polishing of a bad thing, but at least it makes it more readable.
* r600g: move lots of state inline helpers to separate header.Dave Airlie2010-09-032-117/+120
| | | | this gets them out of sight of the main codeflow.
* r600g: drop magic numbers in depth state.Dave Airlie2010-09-032-3/+33
| | | | this also fixes occulsion queries.
* r600g: force unbind of previously bind sampler/sampler_viewJerome Glisse2010-09-021-83/+95
| | | | | | | | | | | | | | | | Previously bind sampler/sampler_view can be converted and endup overwritting the current state we want to schedule. Example : bind texA texB to sampler_view[0] & sampler_view[1], render, bind texB to sampler_view[0] render. Now state associated to texB are set to configure sampler_view slot 0, but as we don't unbind sampler_view[1] still point to texB state so we end up with sampler_view[1] overwritting sampler_view[0], which gives wrong rendering if next rendering bind texA to sampler_view[0], it will endup as texB is bound to sampler_view[0]. If you are not confuse at that point give me a call i will be buying you beer. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix memory/bo leakJerome Glisse2010-09-023-0/+20
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix thinko in shadow code.Dave Airlie2010-09-021-1/+1
| | | | spotted by taiu on irc
* r600g: fix logicop, the 3d ROP is the 2D rop shifted twice.Dave Airlie2010-09-021-1/+1
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* r600g: fix depth texture testsDave Airlie2010-09-021-2/+2
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* r600g: add missing vertex fetch formats to the translation table.Dave Airlie2010-09-022-0/+3
| | | | fixes at least 2 more piglits.
* r600g: fix binding of same texture to several target slotJerome Glisse2010-09-012-23/+62
| | | | | | | | | One can bind same texture or sampler to different slot, each slot needs it own state. The solution implemented here is not exactly beautifull or optimal need to think to somethings better. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix incorrect state naming in pipe_sampler vs pipe_sampler_viewDave Airlie2010-09-021-1/+1
| | | | fixes problems in valgrind with uninitialised values.
* r600g: silence compiler warningJerome Glisse2010-09-011-1/+1
| | | | Signed-off-by: Jerome Glisse <[email protected]>
* r600g: refix db/cb stateJerome Glisse2010-09-016-32/+119
| | | | | Signed-off-by: Dave Airlie <[email protected]> Signed-off-by: Jerome Glisse <[email protected]>
* r600g: fix up default state differences between r6xx and r7xxAlex Deucher2010-09-011-6/+16
| | | | Signed-off-by: Alex Deucher <[email protected]>
* r600g: avoid dynamic allocation of statesJerome Glisse2010-09-0110-927/+399
| | | | | | | | | | | Make state statically allocated, this kills a bunch of code and avoid intensive use of malloc/free. There is still a lot of useless duplicate function wrapping that can be kill. This doesn't improve yet performance, needs to avoid memcpy states in radeon_ctx_set_draw and to avoid rebuilding vs_resources, dsa, scissor, cb_cntl, ... states at each draw command. Signed-off-by: Jerome Glisse <[email protected]>
* Revert "Revert "r600g: precompute some of the hw state""Jerome Glisse2010-09-017-88/+142
| | | | | | | | This reverts commit 1fa7245c348cb7aced81f1672140f64cb6450e2f. Conflicts: src/gallium/drivers/r600/r600_state.c
* nouveau/nvfx: Remove enforcement of bit depth being same as front bufferPatrice Mandin2010-09-011-17/+0
| | | | Signed-off-by: Patrice Mandin <[email protected]>
* r600g: correct cb/zb offset emits.Dave Airlie2010-09-011-2/+2
| | | | This fixes fbo-3d and fbo-cubemap
* Revert "r600g: precompute some of the hw state"Dave Airlie2010-09-017-142/+184
| | | | | | | | | | This reverts commit de0b76cab22caa9fc7260f80acb8f151ccced6c5, its pre-computes the texture state wrong, you can't just use an array of levels, since you can have FBOs to depth texture slices inside a level as well it would get really messy quickly. Probably need to split commits like this up into pieces for each piece of state, so we can revert bits easier in case of regressions. This also break 5 piglit tests, and valgrind starts to warn about invalid read/writes after this.
* r600g: fix typo causing segfault.Dave Airlie2010-09-011-1/+1
| | | | | | | | fixes warning that r600_blit.c: In function ‘r600_resource_copy_region’: r600_blit.c:136: warning: passing argument 1 of ‘util_resource_copy_region’ from incompatible pointer type and also 7 more piglit tests.
* r600g: fix glean texCube and shadows.Dave Airlie2010-09-011-5/+149
| | | | add cube and shadow support to the texture code.
* llvmpipe: slightly simplify build_maskKeith Whitwell2010-08-311-6/+2
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* llvmpipe: combine linear mask calculationKeith Whitwell2010-08-312-15/+84
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* llvmpipe: intrinsics versions of build_mask functionsKeith Whitwell2010-08-311-1/+77
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* r600g: fix up depth write swizzles.Dave Airlie2010-08-311-1/+4
| | | | | | | | For some reason r600c, emits extra instructions in the FP to do the depth write output swizzle, I'm not sure this is required, so here I'm doing it in the exports. this fixes the mesa trivial demos tri-depthwrite and tri-depthwrite2, it doesn't fix the glsl1 gl_FragDepth writing test however.
* r600g: fix fp-fragment-position test.Dave Airlie2010-08-311-0/+1
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* r600g: fix typo in last commitDave Airlie2010-08-311-1/+1
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* r600g: fix position input to fragment shader.Dave Airlie2010-08-311-0/+7
| | | | this fixes a few if the fs shader tests, 10 more piglits
* r600g: remove unneeded function call from scsDave Airlie2010-08-311-4/+0
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