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* freedreno: gallium driver for adrenoRob Clark2013-03-1140-0/+9778
| | | | | | | | | | | | | | | | | | | Currently works on a220. Others in the a2xx family look pretty similar and should be pretty straightforward to support with the same driver. The a3xx has a new shader ISA, and while many registers appear similar, the register addresses have been completely shuffled around. I am not sure yet whether it is best to support with the same driver, but different compiler, or whether it should be split into a different driver. v1: original v2: build file updates from review comments, and remove GPL licensed header files from msm kernel v3: smarter temp/pred register assignment, fix clear and depth/stencil format issues, resource_transfer fixes, scissor fixes Signed-off-by: Rob Clark <[email protected]>
* nv50: Remove nv0_ir_from_sm4.*José Fonseca2013-03-122-2512/+0
| | | | | | Unused, depends on d3d1x. Reviewed-by: Christoph Bumiller <[email protected]>
* softpipe: don't use samplers with prebaked sampler and sampler_view stateRoland Scheidegger2013-03-116-866/+779
| | | | | | | | | | | | | | This is needed for handling the dx10-style sample opcodes. This also simplifies the logic by getting rid of sampler variants completely (sampler_views though OTOH have sort of variants because some of their state is different depending on the shader stage they are bound to). No significant performance difference (openarena run: 840 frames in 459.8 seconds vs. 840 frames in 460.5 seconds). v2: fix reference counting bug spotted by Jose. Reviewed-by: Jose Fonseca <[email protected]>
* r600g/llvm: Fix buildTom Stellard2013-03-111-1/+1
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* r600g: add debug options disabling various copy-buffer-related featuresMarek Olšák2013-03-113-2/+11
| | | | This will be invaluable for debugging and bug reports.
* r600g: allocate FMASK right after the texture, so that it's aligned with itMarek Olšák2013-03-111-1/+1
| | | | | | This avoids the kernel CS checker errors with MSAA textures. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600.h, move the stuff elsewhere (mostly to r600_pipe.h)Marek Olšák2013-03-118-167/+126
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove r600_hw_context_priv.h, move the stuff to r600_pipe.hMarek Olšák2013-03-116-46/+13
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: remove deprecated state management codeMarek Olšák2013-03-1110-560/+2
| | | | | | It's nice to see so much code that did pretty much nothing go away. Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize pixel shaderMarek Olšák2013-03-117-207/+83
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: atomize vertex shaderMarek Olšák2013-03-118-232/+203
| | | | Reviewed-by: Jerome Glisse <[email protected]>
* r600g: inline r600_pipe_shader functionMarek Olšák2013-03-115-58/+51
| | | | | | also change names of other functions, so that they make sense Reviewed-by: Jerome Glisse <[email protected]>
* r600g: dump vertex elements state along with the fetch shaderMarek Olšák2013-03-111-0/+8
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* r600g: remove bytecode dumpingMarek Olšák2013-03-112-240/+0
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: use a single env var R600_DEBUG, disable bytecode dumpingMarek Olšák2013-03-1110-95/+122
| | | | | | | | | | | | | | | | | | | | | | | | | Only the disassembler is used to dump shaders. Here's a few examples how to use R600_DEBUG. Log compute info: R600_DEBUG=compute Dump all shaders: R600_DEBUG=fs,vs,gs,ps,cs Dump pixel shaders only: R600_DEBUG=ps Disable Hyper-Z: R600_DEBUG=nohyperz Disable the LLVM backend: R600_DEBUG=nollvm Or use any combination of the above, or print all options: R600_DEBUG=help Reviewed-by: Tom Stellard <[email protected]>
* r600g: cleanup #include recursion between r600_pipe.h and evergreen_compute.hMarek Olšák2013-03-117-2/+6
| | | | Reviewed-by: Tom Stellard <[email protected]>
* r600g: don't check for R600_ENABLE_S3TC env varMarek Olšák2013-03-111-10/+3
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* i915g: Use PIPE_FLUSH_END_OF_FRAME to trigger throttlingStéphane Marchesin2013-03-088-23/+36
| | | | | This helps with jittering, instead of throttling at every command buffer we only throttle once a frame.
* i915g: Update TODOStéphane Marchesin2013-03-081-12/+1
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* llvmpipe: remove the power of two sizeof(struct cmd_block) assertionBrian Paul2013-03-071-7/+0
| | | | | | | It fails on 32-bit systems (I only tested on 64-bit). Power of two size isn't required, so just remove the assertion. Reviewed-by: José Fonseca <[email protected]>
* radeon/llvm: document LLVM commitChristian König2013-03-071-0/+1
| | | | | | We need at least that revision to work correctly now. Signed-off-by: Christian König <[email protected]>
* radeon/llvm: enable LICM and DCE pass v2Christian König2013-03-071-0/+2
| | | | | | | | | | | | | LICM stands for Loop Invariant Code Motion. Instructions that does not depend of loop index are moved outside of loop body. DCE is DeadCodeElimination. v2: updated commit msg, thx to Vincent. Signed-off-by: Christian König <[email protected]> Reviewed-by: Vincent Lejeune <vljn at ovi.com> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: add LLVMNoUnwindAttribute to intrinsicChristian König2013-03-071-1/+1
| | | | | | | So LLVM can better eliminate dead code. Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: rework input interpolationChristian König2013-03-072-34/+72
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: remove SI.vs.load.buffer.indexChristian König2013-03-072-10/+12
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: make SGPRs proper function arguments v2Christian König2013-03-075-83/+63
| | | | | | | v2: remove unrelated changes Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: replace shader type intrinsic with function attributeChristian König2013-03-073-12/+26
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeonsi: switch to v*i8 for resources and samplers v2Christian König2013-03-071-18/+12
| | | | | | | v2: remove unrelated changes Signed-off-by: Christian König <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* r600g/llvm: Update CONSTANT_BUFFER address space definitionChristian König2013-03-071-1/+1
| | | | | | To match recent LLVM changes. Signed-off-by: Christian König <[email protected]>
* llvmpipe: fix incorrect 'j' array index in dummy texture codeBrian Paul2013-03-061-3/+3
| | | | | | Use 0 instead. Reviewed-by: Roland Scheidegger <[email protected]>
* llvmpipe: remove unused cmd_block_list structBrian Paul2013-03-061-4/+0
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* llvmpipe: add some scene limit sanity check assertionsBrian Paul2013-03-061-0/+22
| | | | | | Note: This is a candidate for the stable branches. Reviewed-by: José Fonseca <[email protected]>
* llvmpipe: tweak CMD_BLOCK_MAX and LP_SCENE_MAX_SIZEBrian Paul2013-03-061-2/+8
| | | | | | | | | | | | | | | | | | | | We advertise a max texture/surfaces size of 8K x 8K but the old values for these limits didn't actually allow us to handle that surface size. For 8K x 8K we'll have 16384 bins. Each bin needs at least one cmd_block object which was 2192 bytes in size. Since 16384 * 2192 exceeded LP_SCENE_MAX_SIZE we'd silently fail in lp_scene_new_data_block() and not draw the complete scene. By reducing CMD_BLOCK_MAX to 29 we get nice 512-byte cmd_blocks. And by increasing LP_SCENE_MAX_SIZE to 9 MB we can allocate enough command blocks for 8K x 8K, plus a few regular data blocks. Fixes the (improved) piglit fbo-maxsize test. Note: This is a candidate for the stable branches. Reviewed-by: José Fonseca <[email protected]>
* radeon/llvm: fix trivial warningsChristian König2013-03-061-4/+3
| | | | Signed-off-by: Christian König <[email protected]>
* radeonsi: fix trivial warningChristian König2013-03-061-1/+0
| | | | Signed-off-by: Christian König <[email protected]>
* r600g: Check comp_mask before merging export instructionsVincent Lejeune2013-03-031-0/+1
| | | | | Fixes a llvm uncovered (rare) bug where consecutive exports were merged even if they have incompatible mask.
* r600g: fix check_and_set_bank_swizzle for caymanVadim Girlin2013-03-031-7/+3
| | | | | Tested-by: Vincent Lejeune <vljn at ovi.com> Reviewed-by: Vincent Lejeune <vljn at ovi.com>
* tgsi: add texel offsets and derivatives to sampler interfaceRoland Scheidegger2013-03-021-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Something I never got around to implement, but this is the tgsi execution side for implementing texel offsets (for ordinary texturing) and explicit derivatives for sampling (though I guess the ordering of the components for the derivs parameters is debatable). There is certainly a runtime cost associated with this. Unless there are different interfaces used depending on the "complexity" of the texture instructions, this is impossible to avoid. Offsets are always active (I think checking if they are active or not is probably not worth it since it should mostly be an add), whereas the sampler_control is extended for explicit derivatives. For now softpipe (the only user of this) just drops all those new values on the floor (which is the part I never implemented...). Additionally this also fixes (discovered by accident) inconsistent projective divide for the comparison coord - the code did do the projection for shadow2d targets, but not shadow1d ones. This also drops checking for projection modifier on array targets, since they aren't possible in any extension I know of (hence we don't actually know if the array layer should also be divided or not). Reviewed-by: Brian Paul <[email protected]>
* llvmpipe: don't assert on illegal surface creation.Roland Scheidegger2013-03-022-4/+4
| | | | | | | | | | | | Since c8eb2d0e829d0d2aea6a982620da0d3cfb5982e2 llvmpipe checks if it's actually legal to create a surface. The opengl state tracker doesn't quite obey this so for now just warn instead of assert. Also warn instead of disabled assert when creating sampler views (same reasoning). Addresses https://bugs.freedesktop.org/show_bug.cgi?id=61647. Reviewed-by: Jose Fonseca <[email protected]>
* llvmpipe: bump glsl version to 140Roland Scheidegger2013-03-021-1/+1
| | | | | | | | | | | | | texel offsets should have been the last missing feature for 130, and in fact 140 as well (last there were texture buffers). In any case we still don't do OpenGL 3.0 (missing MSAA which will be difficult, plus EXT_packed_float, ARB_depth_buffer_float and EXT_framebuffer_sRGB). v2: bump to 140 instead - we have everything except we crash when not writing to gl_Position (but softpipe crashes as well) so let's just say this is a bug instead. Also (by Dave Airlie's suggestion) update llvm-todo.txt. Reviewed-by: Jose Fonseca <[email protected]>
* r600g: enable CP DMA on 6xxAlex Deucher2013-03-011-1/+1
| | | | | | Tested across several 6xx parts, no piglit regressions. Signed-off-by: Alex Deucher <[email protected]>
* r600g: don't require dword alignment with CP DMA for buffer transfersMarek Olšák2013-03-015-11/+9
| | | | | | which is a leftover from the days when we used streamout to copy buffers Tested-by: Andreas Boll <[email protected]>
* r600g: always map uninitialized buffer range as unsynchronizedMarek Olšák2013-03-016-0/+45
| | | | | | | | | | Any driver can implement this simple and efficient optimization. Team Fortress 2 hits it always. The DISCARD_RANGE codepath is not even used with TF2 anymore, so we avoid a ton of useless buffer copies. Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: cleanup deprecated register tablesMarek Olšák2013-03-013-45/+14
| | | | | | These registers are either already emitted elsewhere or moved to start_cs. Tested-by: Andreas Boll <[email protected]>
* r600g: unify vgt statesMarek Olšák2013-03-015-26/+9
| | | | | | | The states were split because we thought it caused a hardlock. Now we know the hardlock was caused by something else and has since been fixed. Tested-by: Andreas Boll <[email protected]>
* r600g: flush and invalidate htile cache when appropriateMarek Olšák2013-03-016-1/+21
| | | | | | Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: atomize streamout enablingMarek Olšák2013-03-019-87/+96
| | | | | | | | | | | | This doesn't fix any issue we know of, but there indeed is a week spot in draw_vbo where streamout can fail. After streamout is enabled, the need_cs_space call can flush the context, which causes the streamout to be disabled right after it was enabled and bad things happen. One way to fix it is to atomize the beginning part, so that no context flush can happen between streamout enabling and the first drawing. Tested-by: Andreas Boll <[email protected]>
* r600g: use async DMA with a non-zero src offsetMarek Olšák2013-03-011-1/+1
| | | | | | | | probably a typo Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: pad the DMA CS to a multiple of 8 dwordsMarek Olšák2013-03-011-2/+14
| | | | | | Tested-by: Andreas Boll <[email protected]> NOTE: This is a candidate for the 9.1 branch.
* r600g: workaround hyperz lockup on evergreenJerome Glisse2013-02-284-2/+23
| | | | | | | | | | | This work around disable hyperz if write to zbuffer is disabled. Somehow using hyperz when not writting to the zbuffer trigger GPU lockup. See : https://bugs.freedesktop.org/show_bug.cgi?id=60848 Candidate for 9.1 Signed-off-by: Jerome Glisse <[email protected]>
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