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* freedreno: drop ARRAY_SIZE macroRob Clark2015-02-251-2/+0
* r600g,radeonsi: fix streamout after pipeline stats have been usedMarek Olšák2015-02-242-13/+1
* radeonsi: small cleanup around current_rast_primMarek Olšák2015-02-241-9/+6
* radeonsi: set current_rast_prim in the right placeMarek Olšák2015-02-241-1/+7
* radeonsi: simplify obtaining a shader property in si_emit_clip_regsMarek Olšák2015-02-241-2/+1
* radeonsi: only preload VertexID for the GS copy shaderMarek Olšák2015-02-241-4/+6
* radeonsi: dump the shader key when dumping shadersMarek Olšák2015-02-241-0/+38
* r600g,radeonsi: cleanup of hex literalsMarek Olšák2015-02-244-32/+32
* radeonsi: set PA_SU_HARDWARE_SCREEN_OFFSET to 0Marek Olšák2015-02-241-0/+2
* r600g: Implement GL_ARB_draw_indirect for EG/CMGlenn Kennard2015-02-2410-35/+129
* freedreno/a4xx: aniso filteringRob Clark2015-02-241-4/+6
* freedreno: update generated headersRob Clark2015-02-245-5/+20
* freedreno/a4xx: add ARB_instanced_arrays supportRob Clark2015-02-242-5/+4
* freedreno/a4xx: handle index_bias (i.e. base_vertex)Rob Clark2015-02-241-1/+1
* freedreno/a4xx: add support for vertexid and instanceid sysvalsRob Clark2015-02-242-11/+24
* freedreno/a4xx: pass number of instances to drawRob Clark2015-02-243-6/+7
* vc4: Update to current kernel sources.Eric Anholt2015-02-248-49/+93
* r600: Fix build after 984f3069370cd4a347cb38269d430b428385affdEric Anholt2015-02-241-1/+1
* mesa: Use assert() instead of ASSERT wrapper.Matt Turner2015-02-231-1/+1
* radeonsi: fix a warning caused by previous commitMarek Olšák2015-02-231-1/+1
* radeonsi: fix point spritesMarek Olšák2015-02-231-1/+1
* freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properlyRob Clark2015-02-211-1/+6
* freedreno: update generated headersRob Clark2015-02-217-16/+44
* freedreno/a4xx: bit of cleanupRob Clark2015-02-214-33/+27
* freedreno: implement fenceRob Clark2015-02-214-74/+65
* freedreno/a2xx: fix increment in assertRob Clark2015-02-211-1/+2
* ilo: R32G32B32_FLOAT need no special care on Gen8+Chia-I Wu2015-02-211-3/+6
* ilo: 128 BPP formats can use TiledY on Gen7.5+Chia-I Wu2015-02-211-1/+6
* nvc0: enable double supportIlia Mirkin2015-02-201-2/+2
* nvc0/ir: remove merge/split pairs to allow normal propagation to occurIlia Mirkin2015-02-201-0/+30
* nvc0/ir: add support for new TGSI double opcodesIlia Mirkin2015-02-201-0/+236
* nvc0/ir: handle zero and negative sqrt argumentsIlia Mirkin2015-02-201-2/+14
* nvc0/ir: no instruction can load a double immediateIlia Mirkin2015-02-201-0/+2
* nvc0/ir: fix lowering of RSQ/RCP/SQRT/MOD to work with F64Ilia Mirkin2015-02-205-16/+40
* gm107/ir: fix F2F flipped stype/dtype flagsIlia Mirkin2015-02-201-2/+2
* gm107/ir: fix DSET boolean float flagIlia Mirkin2015-02-201-0/+1
* gm107/ir: fix DMUL opcode encodingIlia Mirkin2015-02-201-3/+3
* gk110/ir: add emission of dadd/dmul/dmad opcodesIlia Mirkin2015-02-201-3/+77
* nvc0/ir: add emission of dadd/dmul/dmad opcodes, fix minmaxIlia Mirkin2015-02-201-3/+63
* gallium/radeon: fix an uninitialized-variable warningMarek Olšák2015-02-201-1/+1
* gallium: add new double-related shader caps to all the gettersIlia Mirkin2015-02-205-0/+20
* svga: add missing _DROUND,DFRACEXP_DLDEXP_SUPPORTED switch casesBrian Paul2015-02-201-0/+2
* radeonsi: don't use SQC_CACHES to flush ICACHE and KCACHE on SIMarek Olšák2015-02-201-18/+11
* vc4: Keep an array of pointers to instructions defining the temps around.Eric Anholt2015-02-198-68/+67
* vc4: Move qir_uniform() and the constant-value versions to vc4_qir.c/h.Eric Anholt2015-02-193-45/+49
* vc4: Enforce one-uniform-per-instruction after optimization.Eric Anholt2015-02-196-50/+209
* vc4: Rename add_uniform() to qir_uniform().Eric Anholt2015-02-191-15/+15
* vc4: Shut up runtime warnings about new pipe caps.Eric Anholt2015-02-191-0/+2
* nv50: add PIPELINE_STATISTICS query support, based on nvc0Ilia Mirkin2015-02-192-2/+27
* svga: add missing :Ilia Mirkin2015-02-191-1/+1
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