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* vc4: Handle a couple of the transfer map flags.Eric Anholt2014-09-022-4/+12
* radeonsi: Compile dummy pixel shader on demandMichel Dänzer2014-09-022-8/+10
* r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPUMichel Dänzer2014-09-021-9/+14
* nouveau: don't leak dec struct on errorDave Airlie2014-09-021-1/+1
* nouveau/nv40: quiten coverity warning in unused vertex texture code.Dave Airlie2014-09-021-0/+1
* nv50: remove unused variablesIlia Mirkin2014-09-012-2/+0
* nv50: attach the buffer bo to the miptree structuresIlia Mirkin2014-09-011-8/+5
* nv50: mt address may not be the underlying bo's start addressIlia Mirkin2014-09-013-12/+14
* nv50: set the miptree address when clearing bo's in vp2 initIlia Mirkin2014-09-011-0/+2
* nv50/ir: avoid creating instructions that can't be emittedIlia Mirkin2014-09-011-0/+4
* nvc0: don't make 1d staging textures linearIlia Mirkin2014-09-011-1/+0
* nv50: zero out unbound samplersIlia Mirkin2014-09-011-2/+5
* nvc0/ir: avoid infinite recursion when finding first uses of texIlia Mirkin2014-09-012-8/+29
* freedreno/ir3: add DDX/DDYRob Clark2014-09-011-4/+53
* freedreno/ir3: don't keep IR aroundRob Clark2014-09-011-1/+6
* radeonsi: implement EXPCLEAR optimization for depthMarek Olšák2014-09-015-2/+23
* r600g,radeonsi: initialize HTILE to fully-expanded stateMarek Olšák2014-09-011-1/+3
* radeonsi: implement fast depth clearMarek Olšák2014-09-014-2/+21
* radeonsi: move DB_RENDER_CONTROL into draw_vboMarek Olšák2014-09-015-58/+46
* radeonsi: disable occlusion queries if they are not neededMarek Olšák2014-09-011-0/+8
* r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hangMarek Olšák2014-09-012-9/+14
* r600g: set VGT_ENHANCE=4 on R7xxMarek Olšák2014-09-012-0/+2
* r600g: expose AMD_vertex_shader_layer and *_viewport_index on R600-R700Marek Olšák2014-09-011-1/+1
* r600g: fix layered clearMarek Olšák2014-09-011-1/+2
* r600g: some DB bug workarounds for R6xx DB flushingMarek Olšák2014-09-011-0/+7
* r600g: enable fast depth clear for array textures and cubemapsMarek Olšák2014-09-011-1/+2
* r600g: use HTILE allocator from SIMarek Olšák2014-09-013-47/+23
* r600g: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX for EG/CM, inline other fieldsMarek Olšák2014-09-011-9/+12
* radeonsi: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX, inline other fieldsMarek Olšák2014-09-011-9/+8
* r600g: Implement sm5 geometry shader instancingGlenn Kennard2014-09-013-2/+14
* ilo: set INTEL_RELOC_GGTT only on GEN6Chia-I Wu2014-08-311-7/+17
* ilo: fix bound check for 3DSTATE_URB_VSChia-I Wu2014-08-311-3/+3
* ilo: replace cmd by dw0 in GPEChia-I Wu2014-08-312-167/+236
* freedreno/ir3: fix potential null ptr derefRob Clark2014-08-301-1/+2
* freedreno/ir3: add TXBRob Clark2014-08-301-0/+5
* freedreno/ir3: detect scheduler failRob Clark2014-08-303-4/+21
* softpipe: handle vertex texture sampling when using llvm for drawRoland Scheidegger2014-08-309-36/+209
* llvmpipe: (trivial) enable cube map arraysRoland Scheidegger2014-08-301-1/+2
* softpipe: don't assert on illegal wrap mode for rect texturesRoland Scheidegger2014-08-301-2/+2
* r600/compute: Don't leak compute pool item_list/unallocated_listAaron Watry2014-08-291-0/+6
* r600g: Reinstate include path to common radeon source directoryMichel Dänzer2014-08-291-1/+2
* nouveau: allow more tokens by default to avoid parse failuresIlia Mirkin2014-08-281-2/+4
* gallium/radeon: cleanup header inclusionEmil Velikov2014-08-2831-36/+34
* gallium/ilo: cleanup intel_winsys.hEmil Velikov2014-08-283-3/+312
* gallium: add cap for MAX_VERTEX_ATTRIB_STRIDETimothy Arceri2014-08-2713-0/+32
* draw: fix base instance handling in llvm pathRoland Scheidegger2014-08-282-2/+2
* radeon/uvd: remove comment about RV770Alex Deucher2014-08-271-1/+0
* radeon/uvd: fix field handling on R6XX style UVDChristian König2014-08-261-2/+5
* ilo: use genhw command opcodesChia-I Wu2014-08-265-134/+184
* ilo: rename intel_bo_map_unsynchronized()Chia-I Wu2014-08-262-9/+8
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