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drivers
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Author
Age
Files
Lines
...
*
r600: port si_conv_prim_to_gs_out from radeonsi
Dave Airlie
2015-08-29
1
-15
/
+16
*
r600g: use PRIi64 for some compute debug printfs
Dave Airlie
2015-08-29
1
-4
/
+4
*
r600g/sb: Don't crash on empty if jump target
Glenn Kennard
2015-08-28
1
-1
/
+4
*
r600g/sb: Don't read junk after EOP
Glenn Kennard
2015-08-28
3
-1
/
+6
*
r600g/sb: Handle undef in read port tracker
Glenn Kennard
2015-08-28
1
-1
/
+1
*
nir: Convert the builder to use the new NIR cursor API.
Kenneth Graunke
2015-08-27
3
-5
/
+5
*
nouveau: avoid build failures since 0fc21ecf
Ilia Mirkin
2015-08-26
3
-3
/
+3
*
gallium/radeon: read_registers should return bool meaning success or failure
Marek Olšák
2015-08-26
2
-3
/
+3
*
radeonsi: add IB parser support for CP DMA packets
Marek Olšák
2015-08-26
4
-61
/
+122
*
radeonsi: add IB tracing support for debug contexts
Marek Olšák
2015-08-26
5
-16
/
+105
*
radeonsi: remove old CS tracing code
Marek Olšák
2015-08-26
5
-47
/
+3
*
radeonsi: parse and dump status registers on GPU hang
Marek Olšák
2015-08-26
1
-0
/
+52
*
radeonsi: add an IB parser
Marek Olšák
2015-08-26
1
-0
/
+245
*
radeonsi: save the contents of indirect buffers for debug contexts
Marek Olšák
2015-08-26
3
-0
/
+15
*
radeonsi: generate register and packet tables for an IB parser from sid.h
Marek Olšák
2015-08-26
4
-0
/
+190
*
radeonsi: remove duplicated register definitions and instruction definitions
Marek Olšák
2015-08-26
1
-3160
/
+0
*
r600g,radeonsi: remove unused ill-formed register field definitions
Marek Olšák
2015-08-26
2
-2
/
+0
*
radeonsi: add an initial dump_debug_state implementation dumping shaders
Marek Olšák
2015-08-26
4
-0
/
+64
*
radeonsi: allow si_dump_key to write to a file
Marek Olšák
2015-08-26
2
-18
/
+19
*
gallium/ddebug: new pipe for hang detection and driver state dumping (v2)
Marek Olšák
2015-08-26
7
-0
/
+2123
*
gallium: add flags parameter to pipe_screen::context_create
Marek Olšák
2015-08-26
30
-37
/
+45
*
radeonsi: mark unreachable paths to avoid warnings
Grazvydas Ignotas
2015-08-26
2
-3
/
+3
*
freedreno/ir3: fix compile break after splitting out nir_control_flow.h
Rob Clark
2015-08-25
1
-0
/
+1
*
freedreno/ir3: fix compile break after fxn->start_block removal
Rob Clark
2015-08-25
1
-1
/
+1
*
freedreno/a4xx: formats update
Rob Clark
2015-08-24
1
-5
/
+5
*
freedreno: update generated headers
Rob Clark
2015-08-24
5
-5
/
+8
*
nv50: fix 2d engine blits for 64- and 128-bit formats
Ilia Mirkin
2015-08-23
1
-0
/
+4
*
nv50: account for the int RT0 rule for alpha-to-one/cov
Ilia Mirkin
2015-08-23
3
-11
/
+23
*
nv50,nvc0: disable depth bounds test on blit
Ilia Mirkin
2015-08-23
2
-0
/
+3
*
r600g: Fix assert in tgsi_cmp
Glenn Kennard
2015-08-23
1
-2
/
+2
*
nouveau: add codegen/unordered_set.h to the tarball
Emil Velikov
2015-08-22
1
-1
/
+2
*
vc4: Actually allow math results to allocate into r4.
Eric Anholt
2015-08-21
2
-1
/
+7
*
vc4: Fold the 16-bit integer pack into the instructions generating it.
Eric Anholt
2015-08-21
5
-30
/
+22
*
vc4: Reuse QPU dumping for packing bits in QIR.
Eric Anholt
2015-08-21
3
-22
/
+26
*
vc4: Make _dest variants of qir ALU helpers to provide an explicit dest.
Eric Anholt
2015-08-21
2
-4
/
+20
*
vc4: Use the SSA defs list for figuring out eligible MOVs for copy prop.
Eric Anholt
2015-08-21
1
-12
/
+10
*
util/u_blitter: implement alpha blending for pipe->blit
Marek Olšák
2015-08-21
4
-4
/
+8
*
vc4: Add algebraic opt for rcp(1.0).
Eric Anholt
2015-08-20
1
-0
/
+8
*
vc4: Allow unpack_8[abcd]_f's src to stay in r4.
Eric Anholt
2015-08-20
1
-1
/
+15
*
vc4: Pack the unorm-packing bits into a src MUL instruction when possible.
Eric Anholt
2015-08-20
5
-16
/
+104
*
vc4: Add a QIR helper for whether the op is a MUL type.
Eric Anholt
2015-08-20
3
-4
/
+16
*
vc4: Drop an unused algebraic op.
Eric Anholt
2015-08-20
1
-9
/
+0
*
vc4: Switch QPU_PACK_SCALED to be two non-SSA instructions.
Eric Anholt
2015-08-20
5
-21
/
+19
*
vc4: Make the pack-to-unorm instructions be non-SSA.
Eric Anholt
2015-08-20
4
-42
/
+36
*
vc4: Allow QIR registers to be non-SSA.
Eric Anholt
2015-08-20
4
-4
/
+10
*
vc4: We can now move TEX_RESULT accesses across other r4 ops.
Eric Anholt
2015-08-20
1
-16
/
+0
*
nv50/ir: pre-compute BFE arg when both bits and offset are imm
Ilia Mirkin
2015-08-20
1
-3
/
+9
*
r600g: Fix handling of TGSI_OPCODE_ARR with SB
Glenn Kennard
2015-08-21
1
-1
/
+1
*
r600: Turn 'r600_shader_key' struct into union
Edward O'Callaghan
2015-08-21
4
-38
/
+42
*
r600: Rewrite r600_shader_selector_key() to use a switch stmt
Edward O'Callaghan
2015-08-21
1
-7
/
+17
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