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* swr: Enable MSAA in OpenSWR software rendererBruce Cherniak2017-04-146-25/+313
* swr: Removed unnecessary PIPE_BIND flags from swr_is_format_supportedBruce Cherniak2017-04-141-2/+1
* swr: Align swr_context allocation to SIMD alignment.Bruce Cherniak2017-04-141-2/+5
* freedreno: enable draw/batch reordering by defaultRob Clark2017-04-142-3/+3
* freedreno/ir3: small re-orderRob Clark2017-04-141-24/+23
* freedreno/ir3: move 'keeps' to block levelRob Clark2017-04-145-20/+22
* freedreno/ir3: convert dynamic arrays to rallocRob Clark2017-04-143-14/+8
* swr: add linux to scons buildGeorge Kyriazis2017-04-141-6/+1
* gallium/radeon: never use staging buffers with AMD_pinned_memoryNicolai Hähnle2017-04-131-2/+16
* radeonsi: fix gl_BaseVertex in non-indexed drawsNicolai Hähnle2017-04-133-4/+23
* radeonsi: provide VS_STATE input to all VS variantsNicolai Hähnle2017-04-135-27/+18
* radeonsi: change the bit-packing of LS out/TCS in dataNicolai Hähnle2017-04-133-9/+14
* radeonsi: emit VS_STATE register explicitly from si_draw_vboNicolai Hähnle2017-04-136-2/+27
* radeonsi: extract derived tess state emit to higher levelNicolai Hähnle2017-04-131-6/+7
* radeonsi: drop support for TGSI_SEMANTIC_VERTEXID_NOBASENicolai Hähnle2017-04-131-2/+3
* llvmpipe: remove unused subpixel_snap() and fixed_to_float()Samuel Pitoiset2017-04-131-6/+3
* softpipe: remove unused sp_exec_fragment_shader()Samuel Pitoiset2017-04-131-8/+0
* softpipe: remove unused quad_shade_stage()Samuel Pitoiset2017-04-131-8/+0
* softpipe: remove unused get_texel_quad_2d()Samuel Pitoiset2017-04-131-17/+0
* trace: remove some unused trace_dump_tag*() functionsSamuel Pitoiset2017-04-131-52/+0
* virgl: add missing PIPE_CAP_DOUBLESSamuel Pitoiset2017-04-131-0/+1
* nvc0: Enable ARB_shader_ballot on Kepler+Boyan Ding2017-04-131-1/+2
* nvc0/ir: Implement TGSI_OPCODE_BALLOT and TGSI_OPCODE_READ_*Boyan Ding2017-04-131-0/+31
* nvc0/ir: Implement TGSI_SEMANTIC_SUBGROUP_*Boyan Ding2017-04-131-0/+27
* nvc0/ir: Add SV_LANEMASK_* system values.Boyan Ding2017-04-135-0/+25
* nvc0/ir: Allow 0/1 immediate value as source of OP_VOTEBoyan Ding2017-04-133-11/+60
* gk110/ir: Emit OP_SHFLBoyan Ding2017-04-131-0/+56
* nvc0/ir: Emit OP_SHFLBoyan Ding2017-04-131-0/+53
* nvc0/ir: Properly handle a "split form" of predicate destinationBoyan Ding2017-04-131-2/+13
* gm107/ir: Emit third src 'bound' and optional predicate output of SHFLBoyan Ding2017-04-132-9/+29
* Revert "r600g: get rid of dummy pixel shader"Marek Olšák2017-04-123-30/+40
* swr: [rasterizer core] Disable 8x2 tile backendTim Rowley2017-04-111-1/+1
* swr: [rasterizer common] Add _simd_testz_si aliasTim Rowley2017-04-111-0/+1
* swr: [rasterizer archrast] Fix archrast for MSVC 2017 compilerTim Rowley2017-04-115-6/+6
* swr: [rasterizer jitter] Remove unused functionTim Rowley2017-04-112-35/+0
* swr: [rasterizer jitter] Remove HAVE_LLVM tests supporting llvm < 3.8Tim Rowley2017-04-114-52/+0
* swr: [rasterizer common/core] Fix 32-bit windows buildTim Rowley2017-04-116-117/+123
* swr: [rasterizer core] Fix unused variable warningsTim Rowley2017-04-113-10/+1
* swr: [rasterizer core] Code formating changeTim Rowley2017-04-111-10/+10
* swr: [rasterizer core] SIMD16 Frontend WIP - PATim Rowley2017-04-111-22/+22
* swr: [rasterizer core] SIMD16 Frontend WIP - ClipperTim Rowley2017-04-115-124/+941
* swr: [rasterizer core] Multisample sample position setup changeTim Rowley2017-04-113-75/+92
* swr: [rasterizer core] Reduce templates to speed compileTim Rowley2017-04-113-10/+71
* swr: return true for PIPE_CAP_DOUBLESTim Rowley2017-04-111-0/+1
* etnaviv: enable TS, but disable autodisableLucas Stach2017-04-111-2/+2
* etnaviv: enable TS also on sampler resourcesLucas Stach2017-04-111-3/+0
* etnaviv: align TS surface size to number of pixel pipesLucas Stach2017-04-111-1/+2
* etnaviv: avoid using invalid TSLucas Stach2017-04-113-1/+7
* nouveau: when mapping a persistent buffer, synchronize on former xfersIlia Mirkin2017-04-111-4/+2
* nvc0: increase texture buffer object alignment to 256 for pre-GM107Ilia Mirkin2017-04-111-1/+1
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