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* freedreno: PIPE_TRANSFER_DISCARD_WHOLE_RESOURCERob Clark2013-09-141-17/+43
| | | | | | | When the old contents do not need to be preserved, it is faster to create a new backing bo rather than stall. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix VFD_INDEX_MAX overflowRob Clark2013-09-141-1/+1
| | | | | | | max_index may be 0xffffffff. The hardware does not need 1 + max_index (although it does not hurt unless max_index wraps around to zero). Signed-off-by: Rob Clark <[email protected]>
* freedreno: add debug option to disable GMEM bypassRob Clark2013-09-143-1/+3
| | | | | | Useful for debugging. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: handle front_ccwRob Clark2013-09-145-17/+14
| | | | | | Used by supertuxkart. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: stencil fixesRob Clark2013-09-149-7/+30
| | | | | | | | For mem->gmem we don't sample depth/stencil as it's native type. So we need to setup the swizzle state for the sampler based on the format used for sampling. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: alpha-testRob Clark2013-09-147-7/+29
| | | | | | | Needed by some games, like etuxracer and supertuxkart which use alpha test rather than blending, to handle texture transparency. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: implement SUBRob Clark2013-09-141-3/+11
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: use INDIRECT state load for shadersRob Clark2013-09-143-8/+29
| | | | | | | | | With a debug option to force DIRECT (mainly to make it easier for capturing cmdstream dumps). Using INDIRECT for large shaders at least makes a noticable reduction in CPU load, which helps for CPU limited games. Signed-off-by: Rob Clark <[email protected]>
* freedreno: avoid stalling at ringbuffer wraparoundRob Clark2013-09-142-22/+41
| | | | | | | | | Because of how the tiling works, we can't really flush at arbitrary points very easily. So wraparound is handled by resetting to top of ringbuffer. Previously this would stall until current rendering is complete. Instead cycle through multiple ringbuffers to avoid a stall. Signed-off-by: Rob Clark <[email protected]>
* freedreno: emit markers to scratch registersRob Clark2013-09-144-0/+33
| | | | | | | | | Emit markers by writing to scratch registers in order to "triangulate" gpu lockup position from post-mortem register dump. By comparing register values in post-mortem dump to command-stream, it is possible to narrow down which DRAW_INDX caused the lockup. Signed-off-by: Rob Clark <[email protected]>
* freedreno: split out WFI helperRob Clark2013-09-145-10/+12
| | | | | | Mostly just to give an easy debug/instrumentation point. Signed-off-by: Rob Clark <[email protected]>
* freedreno: fd_draw helperRob Clark2013-09-146-52/+55
| | | | | | | Have a single helper that all draws come through.. mainly for a convenient debug and instrumentation point. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix gpu lockup in some piglit testsRob Clark2013-09-141-1/+1
| | | | | | | | | The varying-out config comes from the inputs of the frag shader (so that we aren't exporting unneeded varyinges). The varyings-count should come from the frag shader as well, to avoid a discrepency in configuration and resulting gpu lockup. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: add LITRob Clark2013-09-141-3/+142
| | | | | | Needed by glxgears and etuxracer ;-) Signed-off-by: Rob Clark <[email protected]>
* freedreno: multi-slice resources (cubemap, mipmap, etc)Rob Clark2013-09-1415-52/+141
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeonsi: fix and enable transform feedback for CIKMarek Olšák2013-09-134-28/+40
| | | | | | The CP_STRMOUT_CNTL register was moved again. Reviewed-by: Alex Deucher <[email protected]>
* radeonsi: fix gl_InstanceID with non-zero start_instanceMarek Olšák2013-09-131-3/+4
| | | | | | | | start_instance doesn't affect gl_InstanceID. There's no piglit test, but it's kinda obvious the code was wrong. Reviewed-by: Christian König <[email protected]>
* radeonsi: enable streamout AKA transform feedback for SIMarek Olšák2013-09-131-10/+4
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement streamout shader supportMarek Olšák2013-09-133-15/+276
| | | | | | | | | | | The shader is responsible for writing to streamout buffers using the TBUFFER_STORE_FORMAT_* instructions. The locations of some input SGPRs and VGPRs are assigned dynamically, because the input SGPRs controlling streamout are not declared if they are not needed, decreasing the indices of all following inputs. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement glDrawTransformFeedback functionalityMarek Olšák2013-09-133-0/+30
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: fix streamout queriesMarek Olšák2013-09-131-4/+5
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: implement streamout flush properlyMarek Olšák2013-09-131-1/+7
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: bind streamout buffers to VGT and the vertex shaderMarek Olšák2013-09-134-8/+81
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: handle rasterizer_discard and set GS_OUT_PRIM_TYPEMarek Olšák2013-09-133-1/+31
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: initialize the first CS like any otherMarek Olšák2013-09-135-5/+15
| | | | | | | | | So that the "init" state is always emitted first and not later in draw_vbo. This fixes streamout where the "init" state, which disables streamout, was emitted in draw_vbo after streamout was enabled. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: integrate shared streamout stateMarek Olšák2013-09-137-38/+20
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeon: don't emit streamout state if there are no streamout buffersMarek Olšák2013-09-131-0/+2
| | | | | | | This could happen if set_stream_output_targets is called twice in a row without a draw call in between. Reviewed-by: Michel Dänzer <[email protected]>
* radeon: don't emit VGT_STRMOUT_BUFFER_BASE on SIMarek Olšák2013-09-131-31/+54
| | | | | | The register doesn't exist on SI. Reviewed-by: Michel Dänzer <[email protected]>
* radeon/uvd: move more logic into the common filesChristian König2013-09-126-40/+23
| | | | | | | | Move the code back into the common UVD files since we now have base structures for R600 and radeonsi. Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* radeon/uvd: use more sane defaults for bitstream buffer sizeChristian König2013-09-121-1/+3
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* trace: Support bigger TGSI shaders.José Fonseca2013-09-121-1/+1
| | | | Trivial.
* Move nv30, nv50 and nvc0 to nouveau.Johannes Obermayr2013-09-11160-638/+430
| | | | | | | | | | | | | | | | It is planned to ship openSUSE 13.1 with -shared libs. nouveau.la, nv30.la, nv50.la and nvc0.la are currently LIBADDs in all nouveau related targets. This change makes it possible to easily build one shared libnouveau.so which is then LIBADDed. Also dlopen will be faster for one library instead of three and build time on -jX will be reduced. Whitespace fixes were requested by 'git am'. Signed-off-by: Johannes Obermayr <[email protected]> Acked-by: Christoph Bumiller <[email protected]> Acked-by: Ian Romanick <[email protected]>
* radeonsi: Add parentheses around '|' operands.Vinson Lee2013-09-101-1/+1
| | | | | | | | | | | | | | Fixes GCC parentheses warning. r600_texture.c: In function 'si_texture_create': r600_texture.c:518:20: warning: suggest parentheses around arithmetic in operand of '|' [-Wparentheses] !(templ->bind & PIPE_BIND_CURSOR | PIPE_BIND_LINEAR)) { ^ Fixes "Wrong operator used" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ilo: preliminary GEN 7.5 supportChia-I Wu2013-09-0810-107/+236
| | | | | This is based on grepping for brw->is_haswell in i965 to see how GEN 7.5 differs from GEN 7. Slightly tested with Xonotic and some Mesa demos.
* r600g: remove DMA paddingAlex Deucher2013-09-061-9/+0
| | | | | | | This is now handled in the winsys. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* gallium, intel: Implements new __DRI_IMAGE_USE_LINEAR and PIPE_BIND_LINEAR ↵Axel Davy2013-09-067-6/+17
| | | | | | flags to enforce no tiling. Signed-off-by: Axel Davy <[email protected]>
* i915g: Document fall-through switchStéphane Marchesin2013-09-061-4/+3
| | | | Fixes warning reported by Coverity.
* i915g: Handle i915->batch == NULL correctly in flushStéphane Marchesin2013-09-061-1/+4
| | | | Fixes warning reported by Coverity.
* i915g: Remove useless comparisonStéphane Marchesin2013-09-061-3/+2
| | | | Fixes "Macro compares unsigned to 0" defect reported by Coverity.
* i915g: Fix initial array indexStéphane Marchesin2013-09-061-1/+1
| | | | Fixes "Out-of-bounds read" defect reported by Coverity.
* r600g/compute: Fix bug in compute memory poolTom Stellard2013-09-051-7/+2
| | | | | | | When adding a new buffer to the beginning of the memory pool, we were accidentally deleting the buffer that was first in the buffer list. This was caused by a bug in the memory pool's linked list implementation.
* r600g/compute: Don't flush the cs in pipe_context::launch_grid()Tom Stellard2013-09-051-10/+1
| | | | | | This is the state tracker's responsibility. Reviewed-by: Marek Olšák <[email protected]>
* nv30: fix inconsistent setting of push->user_privIlia Mirkin2013-09-051-1/+1
| | | | | | | It's set to &nv30->bufctx everywhere else. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "9.2" <[email protected]>
* i915g: Implement writemask fixupStéphane Marchesin2013-09-043-38/+90
| | | | | | | | | The fixup code emulates non-BGRA render targets by adding an extra instruction at the end of fragment shaders to swizzle the output. To do this, we also swizzle the blend function. However an oversight until now was that the writemask wasn't getting swizzled. This patch fixes that which fixes a bunch of piglit tests.
* i915g: Stop calling draw_prepare_shader_outputsStéphane Marchesin2013-09-041-2/+0
| | | | | It's not useful on i915g since we don't support primid. Fixes piglit point tests on i915g.
* i915g: Add more optimizationsStéphane Marchesin2013-09-043-58/+371
| | | | | | | | | This patch adds liveness analysis to i915g and a couple optimizations which benefit from it. One interesting optimization turns (fake) indirect texture accesses into direct texture accesses (the i915 supports a maximum of 4 indirect texture accesses). Among other things this fixes a bunch of piglit tests.
* radeonsi: Don't save/restore FMASK sampler view states for u_blitterMichel Dänzer2013-09-021-1/+2
| | | | | | | Fixes assertion failues in 24 piglit tests with MESA_GL_VERSION_OVERRIDE=3.0, 12 of which are now passing. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Expose pure integer vertex formatsMichel Dänzer2013-09-021-1/+6
| | | | | | Fixes 20 piglit tests with MESA_GL_VERSION_OVERRIDE=3.0. Reviewed-by: Marek Olšák <[email protected]>
* nvc0: restore viewport after blitMaarten Lankhorst2013-09-023-4/+7
| | | | | | | Based on calim's original fix in the nine branch. Signed-off-by: Maarten Lankhorst <[email protected]> Cc: "9.2 and 9.1" <[email protected]>
* radeon/uvd: save the aligned width & heightChristian König2013-09-021-0/+2
| | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=68845 Signed-off-by: Christian König <[email protected]>
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