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* svga: also dump SVGA3D_BUFFER surfaces in svga_screen_cache_dump()Brian Paul2016-03-071-2/+8
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* nvc0: reset TFB bufctx when we no longer hold a reference to the buffersIlia Mirkin2016-03-062-2/+3
| | | | | | | | | | This fixes some use-after-free situations in dEQP when an xfb state is removed, and then a clear is triggered, which only does a partial validation. It would attempt to read the no-longer-valid buffers, resulting in crashes. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nv50/ir: using sampleid/pos shouldn't force per-sample interpolationIlia Mirkin2016-03-052-6/+1
| | | | | | See https://www.khronos.org/bugzilla/show_bug.cgi?id=1462 Signed-off-by: Ilia Mirkin <[email protected]>
* svga: add new command-buffer-size HUD queryBrian Paul2016-03-044-7/+23
| | | | | | To plot a graph of the command buffer size. Reviewed-by: Charmaine Lee <[email protected]>
* svga: add new svga_winsys_context::get_command_buffer_size()Brian Paul2016-03-041-0/+6
| | | | | | | To ask how large the current command buffer is. Will be used for a new GALLIUM_HUD graph. Reviewed-by: Charmaine Lee <[email protected]>
* svga: reorder SVGA_QUERY_ switch cases to match declaration orderBrian Paul2016-03-041-9/+9
| | | | Reviewed-by: Charmaine Lee <[email protected]>
* svga: Force an RGBA view creation for an RGBA resourceSinclair Yeh2016-03-041-1/+10
| | | | | | | | | | | glXCreatePixmap() may specify a GLX_TEXTURE_FORMAT_RGB_EXT format for an RGBA resource, causing us to create an RGBX view for an RGBA resource, a combination vgpu10 does not support. When this is detected, change the request to create an RGBA view instead. Reviewed-by: Brian Paul <[email protected]>
* svga: fix an error in svga_texture_generate_mipmapCharmaine Lee2016-03-041-1/+6
| | | | | | | With this patch, make sure the shader resource view is properly created before referencing it in the generate mipmap command. Reviewed-by: Brian Paul <[email protected]>
* radeonsi: Do colorformat endian swap for PIPE_USAGE_STAGINGOded Gabbay2016-03-031-5/+1
| | | | | | | | | | | | | | | | | | There is an old if statement (dated to 2011) that prevented doing endian swap for colorformat, in case the buffer is marked as PIPE_USAGE_STAGING. This is now wrong because st_ReadPixels() reads into a destination texture that is marked with PIPE_USAGE_STAGING. Therefore, even if the texture is rendered correctly to the monitor, when reading it back we get unswapped/wrong values. This patch makes the check_rgba() function in gl-1.0-readpixsanity piglit test pass in big-endian. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* r600g: Do colorformat endian swap for PIPE_USAGE_STAGINGOded Gabbay2016-03-032-17/+2
| | | | | | | | | | | | | | | | | | | | | There is an old if statement (dated to 2011) that prevented doing endian swap for colorformat, in case the buffer is marked as PIPE_USAGE_STAGING. This is now wrong because st_ReadPixels() reads into a destination texture that is marked with PIPE_USAGE_STAGING. Therefore, even if the texture is rendered correctly to the monitor, when reading it back we get unswapped/wrong values. This patch makes the check_rgba() function in gl-1.0-readpixsanity piglit test pass in big-endian. v2: removed duplicate call to r600_colorformat_endian_swap() inside evergreen_init_color_surface_rat() Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* mesa/build: add OpenSWR to buildTim Rowley2016-03-026-0/+427
| | | | | | | Tested on Linux (centos, ubuntu, and suse variants) Reviewed-by: Emil Velikov <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* gallium/swr: add OpenSWR rasterizerTim Rowley2016-03-0288-0/+48234
| | | | | Acked-by: Roland Scheidegger <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* gallium/swr: add OpenSWR driverTim Rowley2016-03-0223-0/+5718
| | | | | | | | OpenSWR is a new software rasterizer for x86 processors designed for high performance and high scalablility on visualization workloads. Acked-by: Roland Scheidegger <[email protected]> Acked-by: Jose Fonseca <[email protected]>
* gk110/ir: fix wrong emission of NOT modifier for VOTESamuel Pitoiset2016-03-021-1/+1
| | | | | | | | Spotted by Coverity. Signed-off-by: Samuel Pitoiset <[email protected]> Reported-by: Matt Turner <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* freedreno/ir3: enable shareable shadersRob Clark2016-03-015-8/+12
| | | | | | | Now that we are no longer using the pctx reference in the shader, drop it and turn on shareable shaders. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: pass ctx to constant-emit codeRob Clark2016-03-014-25/+21
| | | | | | | Rather than fishing it out of the shader. This removes the other big user of shader->pctx. Signed-off-by: Rob Clark <[email protected]>
* freedreno/ir3: add dev ptr to ir3_compilerRob Clark2016-03-016-8/+10
| | | | | | | | And use this for allocating bo's to hold the shader binary, rather than accessing the dev via ctx ptr. One step towards making shaders sharable across contexts. Signed-off-by: Rob Clark <[email protected]>
* virgl: add support for passing render condition flags to host.Dave Airlie2016-03-012-1/+5
| | | | | | | | This just passes the extra blit info to fix the render condition tests. Cc: "11.2" <[email protected]> Signed-off-by: Dave Airlie <[email protected]>
* r600g: remove support for DRM < 2.12.0Marek Olšák2016-03-016-68/+16
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* r300g: remove support for DRM < 2.12.0Marek Olšák2016-03-015-76/+7
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* winsys/radeon: drop support for DRM 2.12.0 (kernel < 3.2)Marek Olšák2016-03-011-15/+1
| | | | | | | | | | | | | | in order to make some winsys interface changes easier This distros should use new DRM if they want to use new Mesa: Distro kernel mesa eol SLES 10 2.6.16 6.4.2 2016-07 SLED 11 3.0 9.0.3 2022-03 RHEL 5 2.6.18 6.5.1 2017-03 RHEL 6 2.6.32 10.4.3 2020-11 Debian 6 2.6.32 7.7.1 2016-02 Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: also dump shaders on a VM faultMarek Olšák2016-03-011-2/+1
| | | | Reviewed-by: Christian König <[email protected]>
* radeonsi: dump full shader disassemblies into ddebug logsMarek Olšák2016-03-011-9/+9
| | | | | | including prolog and epilog disassemblies Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: allow dumping shader disassemblies to a fileMarek Olšák2016-03-013-22/+29
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: use re-ZMarek Olšák2016-03-013-6/+21
| | | | | | | | | This can increase perf for shaders that kill pixels (kill, alpha-test, alpha-to-coverage). v2: add comments Reviewed-by: Michel Dänzer <[email protected]>
* r600: Make enum alu_op_flags unsignedRob Herring2016-02-291-8/+8
| | | | | | | | | | | | | | | | | | In builds with clang, there are several errors related to the enum alu_op_flags like this: src/gallium/drivers/r600/sb/sb_expr.cpp:887:8: error: case value evaluates to -1610612736, which cannot be narrowed to type 'unsigned int' [-Wc++11-narrowing] These are due to the MSB being set in the enum. Fix these errors by making the enum values unsigned as needed. The flags field that stores this enum also needs to be unsigned. Cc: "11.1 11.2" <[email protected]> Cc: Marek Olšák <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* gallium/radeon: Add space between string literal and identifierRob Herring2016-02-291-1/+1
| | | | | | | | | | | | | Fix compiles with clang that have this C++11 error: src/gallium/drivers/radeon/r600_pipe_common.h:662:34: error: invalid suffix on literal; C++11 requires a space between literal and identifier [-Wreserved-user-defined-literal] Cc: "11.1 11.2" <[email protected]> Cc: Marek Olšák <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Michel Dänzer <[email protected]>
* freedreno: drop unnecessary -Wno-packed-bitfield-compatRob Herring2016-02-291-2/+2
| | | | | | | | | | | | Enabling this warning doesn't generate any warnings with gcc, but is an unknown option for clang, so drop it. Signed-off-by: Rob Herring <[email protected]> Acked-by: Rob Clark <[email protected]> (v1) Cc: "11.1 11.2" <[email protected]> v2: keep the warning around, commented out Signed-off-by: Emil Velikov <[email protected]>
* Android: fix build break from nir/glsl move to compiler/Rob Herring2016-02-293-4/+7
| | | | | | | | | | | | | | | | Commits a39a8fbbaa12 ("nir: move to compiler/") and eb63640c1d38 ("glsl: move to compiler/") broke Android builds. Fix them. There is also a missing dependency between generated NIR headers and several libraries. This isn't a new issue, but seems to have been exposed by the NIR move. Built with i915, i965, freedreno, r300g, r600g, vc4, and virgl enabled. Cc: "11.2" <[email protected]> Cc: Mauro Rossi <[email protected]> Signed-off-by: Rob Herring <[email protected]> Reviewed-by: Emil Velikov <[email protected]>
* gallium/radeon: disable evergreen_do_fast_color_clear for BEOded Gabbay2016-02-291-0/+5
| | | | | | | | | | | | | | | | This function is currently broken for BE. I assume it's because of util_pack_color(). Until I fix this path, I prefer to disable it so users would be able to see correct colors on their desktop and applications. Together with the two following patches: - gallium/r600: Don't let h/w do endian swap for colorformat - gallium/radeon: remove separate BE path in r600_translate_colorswap it fixes BZ#72877 and BZ#92039 Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/r600: Don't let h/w do endian swap for colorformatOded Gabbay2016-02-291-0/+7
| | | | | | | | | | | | | | Since the rework on gallium pipe formats, there is no more need to do endian swap of the colorformat in the h/w, because the conversion between mesa format and gallium (pipe) format takes endianess into account (see the big #if in p_format.h). v2: return ENDIAN_NONE only for four 8-bits components (V_0280A0_COLOR_8_8_8_8) Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: remove separate BE path in r600_translate_colorswapOded Gabbay2016-02-291-12/+1
| | | | | | | | | | | | | | | | | | | | After further testing, it appears there is no need for separate BE path in r600_translate_colorswap() The only fix remaining is the change of the last if statement, in the 4 channels case. Originally, it contained an invalid swizzle configuration that never got hit, in LE or BE. So the fix is relevant for both systems. This patch adds an additional 120 available visuals for LE and BE, as seen in glxinfo v2: Tested for regressions by running piglit gpu.py with CAICOS (r600g) on x86-64 machine. No regressions found. Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nv50/ir: emit VOTE instructionSamuel Pitoiset2016-02-286-0/+83
| | | | | | | | Changes from v2: - add missing NOT modifier for GK110/GM107 Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* gk110/ir: add ld lock/st unlock emissionSamuel Pitoiset2016-02-281-2/+28
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50,nvc0: bump minimum texture buffer offset alignmentIlia Mirkin2016-02-272-2/+2
| | | | | | | | It appears that it actually needs to be aligned to the datum size, so it was 1 when testing with R8, but it can be as high as 16 with RGBA32. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "11.1 11.2" <[email protected]>
* nvc0: rework nvc0_compute_validate_program()Samuel Pitoiset2016-02-266-44/+20
| | | | | | | | | | Reduce the amount of duplicated code by re-using nvc0_program_validate(). While we are at it, change the prototype to return void and remove nvc0_compute.h which is now useless. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: make sure to validate compute global buffers on FermiSamuel Pitoiset2016-02-261-1/+3
| | | | | | | | | No reason to not validate those global buffers and this might avoid fails if someone try to use the global memory from compute programs. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* nvc0: move nvc0_validate_global_residents() to nvc0_compute.cSamuel Pitoiset2016-02-264-19/+17
| | | | | | | | | While we are at it, rename it to nvc0_compute_validate_globals() and update its prototype. Signed-off-by: Samuel Pitoiset <[email protected]> Acked-by: Pierre Moreau <[email protected]> Acked-by: Ilia Mirkin <[email protected]>
* virgl: add missing CAP turned off.Dave Airlie2016-02-261-0/+3
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* gallium/radeon: return correct values for BE in r600_translate_colorswapOded Gabbay2016-02-251-4/+4
| | | | | | | | | | | | | | | Because I changed the swizzle check, I also need to adapt the return values for each check. It's basically almost the same as before, we just cross between STD and STD_REV, and cross between ALT and ALT_REV This fixes the rgba test in gl-1.0-readpixsanity (piglit) and also fixes tri-flat (mesa demos). Signed-off-by: Oded Gabbay <[email protected]> Cc: "11.1 11.2" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* gallium/radeon: Correctly translate colorswaps for big endianOded Gabbay2016-02-231-0/+11
| | | | | | | | | | | | | | | | | | | | | | The current code in r600_translate_colorswap uses the swizzle information to determine which colorswap to use. This works for BE & LE when the nr_channels is <4, but when nr_channels==4 (e.g. PIPE_FORMAT_A8R8G8B8_UNORM), this method can not be used for both BE and LE, because the swizzle info is the same for both of them. As a result, r600g doesn't support 24bit color formats, only 16bit, which forces the user to choose 16bit color in X server. This patch fixes this bug by separating the checks for LE and BE and adapting the swizzle conditions in the BE part of the checks. Tested on an Evergreen GPU (Cedar GL FirePro 2270) running inside POWER7 Big-Endian Machine. Signed-off-by: Oded Gabbay <[email protected]> CC: "11.2" "11.1" <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* nvc0: rename 3d binding points to NVC0_BIND_3D_XXXSamuel Pitoiset2016-02-229-63/+64
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: rename 3d dirty flags to NVC0_NEW_3D_XXXSamuel Pitoiset2016-02-228-133/+133
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: prefix compute macros with _CP_ instead of _COMPUTE_Samuel Pitoiset2016-02-224-4/+4
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: rename NVXX_COMPUTE to NVXX_CPSamuel Pitoiset2016-02-225-117/+117
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0: rename nvc0_context::dirty to nvc0_context::dirty_3dSamuel Pitoiset2016-02-228-64/+64
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nvc0/ir: add missing emission of locked load predicateSamuel Pitoiset2016-02-221-0/+7
| | | | | | | | | Like unlocked store on shared memory, locked store can fail and the second dest which is a predicate must be emitted. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]> Cc: [email protected]
* nvc0/ir: add ld lock/st unlock emission on GK104Samuel Pitoiset2016-02-221-10/+25
| | | | | Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* nv50/ir: restore OP_SELP to be a regular instructionSamuel Pitoiset2016-02-224-14/+14
| | | | | | | | | | | Actually OP_SELP doesn't need to be a compare instruction. Instead we just need to set the NOT modifier when building the instruction. While we are at it, fix the dst register type and use a GPR. Suggested by Ilia Mirkin. Signed-off-by: Samuel Pitoiset <[email protected]> Reviewed-by: Ilia Mirkin <[email protected]>
* svga: unbind index buffer when drawing non-indexed primitivesBrian Paul2016-02-221-0/+10
| | | | | | | | | Silences a warning reported by the svga3d device. v2: also null-out the index buffer pointer Reviewed-by: Sinclair Yeh <[email protected]> Reviewed-by: Charmaine Lee <[email protected]>
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