| Commit message (Collapse) | Author | Age | Files | Lines |
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Cayman is the RadeonHD 69xx series of GPUs. This adds support for
3D acceleration to the r600g driver.
Major changes:
Some context registers moved around - mainly MSAA and clipping/guardband related.
GPR allocation is all dynamic
no vertex cache - all unified in texture cache.
5-wide to 4-wide shader engines (no scalar or trans slot)
- some changes to how instructions are placed into slots
- removal of END_OF_PROGRAM bit in favour of END flow control clause
- no vertex fetch clause - TC accepts vertex or texture
Signed-off-by: Dave Airlie <[email protected]>
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These don't need one, and I was seeing 0xff being returned and set in
the GPU registers with some tests.
Signed-off-by: Dave Airlie <[email protected]>
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According to OpenGL 3.1 chapter 2.1.5 the representation without zero
should only be used for vertex attribute values, but not for textures
or frame-buffers.
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Clip distance is calculated each time vertex position is written
which is suboptiomal is some cases but very safe.
User clip planes are an obsolete feature anyway.
Every time number of clip planes increases, the vertex program
is recompiled.
That ensures no overhead in normal case (no user clip planes)
and reasonable overhead otherwise.
Fixes 3D windows in compiz, and reflection effect in neverball.
Also fixes compiz expo plugin when windows were dragged and each
window shown 3 times.
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Nothing special, just changing conditions for when HiZ can be enabled and
when HiZ memory becomes invalid.
I was thinking about it again and realized it had not been quite right.
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Such as HiZ.
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We ask for Hyper-Z access when clearing a zbuffer.
We release it if no zbuffer clear has been done for 2 seconds.
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For example, an indirect load like "ld b128 $r0q c0[$r0]" seems to
overwrite the address register before finishing the load, but only
if there are a lot of threads running.
Visible as displaced geoemtry in Unigine Heaven.
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Signed-off-by: Matt Turner <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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util_logbase2 is exactly the same function.
Signed-off-by: Matt Turner <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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Signed-off-by: Francesco Marella <[email protected]>
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This table covered a large range unnecessarily, reduce the address
range covered, use the fact that the bottom two bits aren't significant,
and remove unused fields from the range struct. It also drops the hash_size/shift in context in favour of a define, which should make doing the math
a bit less CPU intensive.
valgrind glxinfo
Before:
==320== in use at exit: 419,754 bytes in 706 blocks
==320== total heap usage: 3,691 allocs, 2,985 frees, 7,272,467 bytes allocated
After:
==967== in use at exit: 419,754 bytes in 706 blocks
==967== total heap usage: 3,552 allocs, 2,846 frees, 3,550,131 bytes allocated
Signed-off-by: Dave Airlie <[email protected]>
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Introduced by 531b12af35a832bcd8928a4919d76f8e9405cde0.
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If state tracker asked us to map resource directly and we can't
do it (because of tiling), return NULL instead of doing full transfer
- state tracker should handle it and fallback to some other method
or repeat transfer without PIPE_TRANSFER_MAP_DIRECTLY.
It greatly improves performance of xorg state tracker on nv50+,
because its fallback (DFS/UTS) is much faster than full transfer.
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Signed-off-by: Jerome Glisse <[email protected]>
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Signed-off-by: Nicolas Kaiser <[email protected]>
Signed-off-by: Brian Paul <[email protected]>
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The r600/r700 support will follow soon.
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We need to distinguish surfaces for mouse cursors from scanouts,
because nv50 hardware display engine ignores tiling flags.
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Spotted by Henri Verbeet
Signed-off-by: Alex Deucher <[email protected]>
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Setting SOURCE_FORMAT to EXPORT_NORM is an optimization.
Leaving SOURCE_FORMAT at 0 will work in all cases, but is less
efficient. The conditions for the setting the EXPORT_NORM
optimization are as follows:
R600/RV6xx:
BLEND_CLAMP is enabled
BLEND_FLOAT32 is disabled
11-bit or smaller UNORM/SNORM/SRGB
R7xx/evergreen:
11-bit or smaller UNORM/SNORM/SRGB
16-bit or smaller FLOAT
Signed-off-by: Alex Deucher <[email protected]>
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r6xx asics have some problems with the surface
sync logic for the CB and DB. It's recommended
to use the event write interface for flushing
the DB/CB caches rather than the sync packets.
A single event write flush flushes all dst
caches, so we only need one for all CBs and DB.
Should fix:
https://bugs.freedesktop.org/show_bug.cgi?id=35312
Signed-off-by: Alex Deucher <[email protected]>
Signed-off-by: Dave Airlie <[email protected]>
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This fixes piglit fbo-alphatest-formats on Evergreen.
Signed-off-by: Henri Verbeet <[email protected]>
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We'll handle them like f64 vertex buffers, by falling back to
copying vertex data to the command buffer through translate.
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All texture LOD tests pass.
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This reverts commit 1dc204d145dc8c0b19473a7814c201a8954b6274.
MC_COORD_TRUNCATE is for MPEG and produces quite an interesting behavior
on regular textures. Anyway that commit broke filtering in demos/cubemap.
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DONTBLOCK is correctly handled in r600_bo_map.
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Tested-by: Christopher Egert <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
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The new allocator uses ra and does swizzle packing.
Also, a data structure (struct rc_variable) and associated functions have
been added for generating UD and DU chains.
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Nothing else needed.
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Reviewed-by: Jakob Bornecrantz <[email protected]>
Reviewed-by: Daniel Vetter <[email protected]>
Signed-off-by: Christopher Egert <[email protected]>
Signed-off-by: Jakob Bornecrantz <[email protected]>
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Fixes piglit regression.
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If we run out of bin memory and do an early return from
lp_setup_begin_query() we'd omit setting the setup->active_query
pointer. Then, when lp_setup_end_query() was later called, the
assertion for setup->active_query == pq would fail. Moving the
assigment in lp_setup_begin_query() avoids that.
Reviewed-by: Jose Fonseca <[email protected]>
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User-defined clip planes were a swtnl fallback before.
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This is safe because it's initialized if buffers & PIPE_CLEAR_COLOR and
probably doesn't have any effect otherwise.
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Signed-off-by: Henri Verbeet <[email protected]>
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