| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| ... | |
| * | vc4: Add a CSE optimization pass. | Eric Anholt | 2014-09-04 | 4 | -0/+238 |
| * | vc4: Switch to using native integers. | Eric Anholt | 2014-09-04 | 5 | -6/+228 |
| * | vc4: Expose compares at a lower level in QIR. | Eric Anholt | 2014-09-04 | 5 | -79/+148 |
| * | vc4: Stop being so clever in CMP handling. | Eric Anholt | 2014-09-04 | 1 | -23/+6 |
| * | r600g,radeonsi: make sure there's enough CS space before resuming queries | Marek Olšák | 2014-09-04 | 1 | -0/+28 |
| * | Revert "r600g,radeonsi: initialize HTILE to fully-expanded state" | Marek Olšák | 2014-09-04 | 1 | -3/+1 |
| * | Eliminate several cases of multiplication in arguments to calloc | Carl Worth | 2014-09-03 | 3 | -3/+3 |
| * | r600g: fix alpha-test with HyperZ enabled, fixing L4D2 tree corruption | Marek Olšák | 2014-09-03 | 1 | -6/+6 |
| * | r600g,radeonsi: Preserve existing buffer flags | Michel Dänzer | 2014-09-03 | 1 | -3/+3 |
| * | r300g: pointless assignment of info.indexed | Dave Airlie | 2014-09-03 | 1 | -2/+0 |
| * | vc4: Handle a couple of the transfer map flags. | Eric Anholt | 2014-09-02 | 2 | -4/+12 |
| * | radeonsi: Compile dummy pixel shader on demand | Michel Dänzer | 2014-09-02 | 2 | -8/+10 |
| * | r600g,radeonsi: Inform the kernel if a BO will likely be accessed by the CPU | Michel Dänzer | 2014-09-02 | 1 | -9/+14 |
| * | nouveau: don't leak dec struct on error | Dave Airlie | 2014-09-02 | 1 | -1/+1 |
| * | nouveau/nv40: quiten coverity warning in unused vertex texture code. | Dave Airlie | 2014-09-02 | 1 | -0/+1 |
| * | nv50: remove unused variables | Ilia Mirkin | 2014-09-01 | 2 | -2/+0 |
| * | nv50: attach the buffer bo to the miptree structures | Ilia Mirkin | 2014-09-01 | 1 | -8/+5 |
| * | nv50: mt address may not be the underlying bo's start address | Ilia Mirkin | 2014-09-01 | 3 | -12/+14 |
| * | nv50: set the miptree address when clearing bo's in vp2 init | Ilia Mirkin | 2014-09-01 | 1 | -0/+2 |
| * | nv50/ir: avoid creating instructions that can't be emitted | Ilia Mirkin | 2014-09-01 | 1 | -0/+4 |
| * | nvc0: don't make 1d staging textures linear | Ilia Mirkin | 2014-09-01 | 1 | -1/+0 |
| * | nv50: zero out unbound samplers | Ilia Mirkin | 2014-09-01 | 1 | -2/+5 |
| * | nvc0/ir: avoid infinite recursion when finding first uses of tex | Ilia Mirkin | 2014-09-01 | 2 | -8/+29 |
| * | freedreno/ir3: add DDX/DDY | Rob Clark | 2014-09-01 | 1 | -4/+53 |
| * | freedreno/ir3: don't keep IR around | Rob Clark | 2014-09-01 | 1 | -1/+6 |
| * | radeonsi: implement EXPCLEAR optimization for depth | Marek Olšák | 2014-09-01 | 5 | -2/+23 |
| * | r600g,radeonsi: initialize HTILE to fully-expanded state | Marek Olšák | 2014-09-01 | 1 | -1/+3 |
| * | radeonsi: implement fast depth clear | Marek Olšák | 2014-09-01 | 4 | -2/+21 |
| * | radeonsi: move DB_RENDER_CONTROL into draw_vbo | Marek Olšák | 2014-09-01 | 5 | -58/+46 |
| * | radeonsi: disable occlusion queries if they are not needed | Marek Olšák | 2014-09-01 | 1 | -0/+8 |
| * | r600g,radeonsi: force fast stencil and HTILE stencil off, fixing a Hyper-Z hang | Marek Olšák | 2014-09-01 | 2 | -9/+14 |
| * | r600g: set VGT_ENHANCE=4 on R7xx | Marek Olšák | 2014-09-01 | 2 | -0/+2 |
| * | r600g: expose AMD_vertex_shader_layer and *_viewport_index on R600-R700 | Marek Olšák | 2014-09-01 | 1 | -1/+1 |
| * | r600g: fix layered clear | Marek Olšák | 2014-09-01 | 1 | -1/+2 |
| * | r600g: some DB bug workarounds for R6xx DB flushing | Marek Olšák | 2014-09-01 | 1 | -0/+7 |
| * | r600g: enable fast depth clear for array textures and cubemaps | Marek Olšák | 2014-09-01 | 1 | -1/+2 |
| * | r600g: use HTILE allocator from SI | Marek Olšák | 2014-09-01 | 3 | -47/+23 |
| * | r600g: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX for EG/CM, inline other fields | Marek Olšák | 2014-09-01 | 1 | -9/+12 |
| * | radeonsi: set DB_DEPTH_SIZE.HEIGHT_TILE_MAX, inline other fields | Marek Olšák | 2014-09-01 | 1 | -9/+8 |
| * | r600g: Implement sm5 geometry shader instancing | Glenn Kennard | 2014-09-01 | 3 | -2/+14 |
| * | ilo: set INTEL_RELOC_GGTT only on GEN6 | Chia-I Wu | 2014-08-31 | 1 | -7/+17 |
| * | ilo: fix bound check for 3DSTATE_URB_VS | Chia-I Wu | 2014-08-31 | 1 | -3/+3 |
| * | ilo: replace cmd by dw0 in GPE | Chia-I Wu | 2014-08-31 | 2 | -167/+236 |
| * | freedreno/ir3: fix potential null ptr deref | Rob Clark | 2014-08-30 | 1 | -1/+2 |
| * | freedreno/ir3: add TXB | Rob Clark | 2014-08-30 | 1 | -0/+5 |
| * | freedreno/ir3: detect scheduler fail | Rob Clark | 2014-08-30 | 3 | -4/+21 |
| * | softpipe: handle vertex texture sampling when using llvm for draw | Roland Scheidegger | 2014-08-30 | 9 | -36/+209 |
| * | llvmpipe: (trivial) enable cube map arrays | Roland Scheidegger | 2014-08-30 | 1 | -1/+2 |
| * | softpipe: don't assert on illegal wrap mode for rect textures | Roland Scheidegger | 2014-08-30 | 1 | -2/+2 |
| * | r600/compute: Don't leak compute pool item_list/unallocated_list | Aaron Watry | 2014-08-29 | 1 | -0/+6 |
