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* nv30: check for NULL vertex buffers in prevalidate_vbufsChristoph Bumiller2012-05-221-1/+1
* nv50: make unaligned index buffer offsets work againChristoph Bumiller2012-05-221-1/+3
* nvc0: don't set NEW_IDXBUF in nvc0_switch_pipe_context if none is boundChristoph Bumiller2012-05-221-0/+2
* llvmpipe: Added a error counter to lp_test_conv.James Benton2012-05-211-3/+7
* llvmpipe: Changed known failures in lp_test_conv.James Benton2012-05-211-3/+9
* llvmpipe: Added fixed point types tests to lp_test_conv.James Benton2012-05-211-6/+7
* radeon/llvm: Handle selectcc DAG nodeTom Stellard2012-05-207-54/+350
* svga: whitespace, comments, formatting clean-upsBrian Paul2012-05-191-38/+31
* svga: return PIPE_OK instead of 0Brian Paul2012-05-195-11/+11
* svga: fix zero-stride vertex array bugBrian Paul2012-05-191-2/+6
* radeonsi: Only honour point related rasterizer state when rendering points.Michel Dänzer2012-05-181-2/+3
* radeonsi: Fix parameter cache offsets for fragment shader inputs.Michel Dänzer2012-05-183-2/+4
* radeon/llvm: Fix segfault while lowering lrp intrinsicTom Stellard2012-05-171-2/+3
* radeon/llvm: Add DAG nodes for MIN instructionsTom Stellard2012-05-176-14/+38
* llvmpipe: Avoid adding floating point zero to flat inputs.José Fonseca2012-05-181-1/+4
* llvmpipe: Implement TXQ.Olivier Galibert2012-05-181-0/+23
* llvmpipe: Don't mess with the provoking vertex when inverting a triangle.Olivier Galibert2012-05-181-5/+40
* radeon/llvm: Lower lrp intrinsic during ISelTom Stellard2012-05-173-7/+19
* radeon/llvm: Remove AMDIL MAD instruction defsTom Stellard2012-05-176-7/+14
* radeon/llvm: Remove AMDIL MUL_IEEE* instructionsTom Stellard2012-05-173-7/+3
* r600g: Handle MUL_IEEE in r600_bytecode_get_num_operandsTom Stellard2012-05-171-0/+2
* radeon/llvm: Expand fsub during ISelTom Stellard2012-05-172-11/+2
* radeon/llvm: Remove AMDIL floating-point ADD instruction defsTom Stellard2012-05-175-8/+9
* radeon/llvm: Remove AMDIL CMOVLOG* instruction defsTom Stellard2012-05-174-26/+6
* radeon/llvm: Move lowering of ABS_i32 to ISelTom Stellard2012-05-174-17/+16
* radeon/llvm: Remove sub patterns from AMDILInstrPatterns.tdTom Stellard2012-05-172-21/+1
* radeon/llvm: Add custom SDNodes for MAXTom Stellard2012-05-1710-10/+108
* nouveau: place static buffers in VRAM if preferred by the driverChristoph Bumiller2012-05-176-12/+62
* nv50/ir: fix reversed order of lane ops in quadopsChristoph Bumiller2012-05-172-4/+6
* nv50,nvc0: handle user vertex buffersChristoph Bumiller2012-05-1714-308/+423
* nv50,nvc0: handle user index buffersChristoph Bumiller2012-05-178-47/+49
* nv50,nvc0: handle user constbufs without wrapping them in a resourceChristoph Bumiller2012-05-1714-165/+201
* gallium/radeon: Fix r300g tiling breakage.Michel Dänzer2012-05-164-0/+4
* radeonsi: Initial tiling support.Michel Dänzer2012-05-165-128/+356
* r600g: Set tiling information for BOs being shared.Michel Dänzer2012-05-161-0/+12
* radeonsi: Bump MAX_DRAW_CS_DWORDS.Michel Dänzer2012-05-163-3/+3
* draw,llvmpipe: Avoid named struct types on LLVM 3.0 and later.José Fonseca2012-05-161-10/+2
* llvmpipe: Color slot interpolation can be flat or perspective, not linear.Olivier Galibert2012-05-163-3/+3
* llvmpipe: Add a test for lp_build_sgn.José Fonseca2012-05-151-0/+13
* svga: fix FBO / viewport bugsBrian Paul2012-05-151-7/+24
* radeon/llvm: add support for texture offsets, fix TEX_LDVadim Girlin2012-05-154-10/+51
* radeon/llvm: add SET_GRADIENTS*, fix SAMPLE_GVadim Girlin2012-05-156-9/+108
* radeon/llvm: increase const regs countVadim Girlin2012-05-151-1/+1
* radeon/llvm: use IntrNoMem property for intrinsics where possibleVadim Girlin2012-05-157-105/+171
* radeon/llvm: use correct intrinsic for CEILVadim Girlin2012-05-152-3/+3
* radeon/llvm: improve ABS_i32 loweringVadim Girlin2012-05-151-13/+5
* radeon/llvm: fix BUILD_VECTOR lowering for replicated valueVadim Girlin2012-05-151-0/+2
* radeon/llvm: add names for AMDGPU* passesVadim Girlin2012-05-152-0/+5
* radeon/llvm: add generated files to .gitignoreVadim Girlin2012-05-151-0/+18
* radeonsi: Keep around copies of original sampler states.Michel Dänzer2012-05-141-0/+2
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