| Commit message (Expand) | Author | Age | Files | Lines |
|---|
| * | nvc0: maxwell isa has no per-instruction join modifier | Ben Skeggs | 2014-05-15 | 4 | -19/+23 |
| * | nvc0: replace immd 0 with $rLASTGPR for emit/restart opcodes | Ben Skeggs | 2014-05-15 | 1 | -0/+1 |
| * | nvc0: move nvc0 lowering pass class definitions into header | Ben Skeggs | 2014-05-15 | 3 | -106/+136 |
| * | nvc0: bump sched data member to 32-bits | Ben Skeggs | 2014-05-15 | 1 | -1/+1 |
| * | nvc0: use vertex arrays for eng3d blit | Ben Skeggs | 2014-05-15 | 1 | -31/+64 |
| * | nvc0: restrict "constant vbo" logic to fermi/kepler classes | Ben Skeggs | 2014-05-15 | 1 | -1/+1 |
| * | nvc0: replace some vb->stride checks with constant_vbo instead | Ben Skeggs | 2014-05-15 | 1 | -3/+3 |
| * | nvc0: add maxwell class | Ben Skeggs | 2014-05-15 | 2 | -0/+4 |
| * | nvc0: allow for easier modification of compiler library routines | Ben Skeggs | 2014-05-15 | 13 | -1057/+1057 |
| * | nvc0: properly distribute macros in source form | Ben Skeggs | 2014-05-15 | 5 | -244/+365 |
| * | radeonsi: Fix anisotropic filtering state setup | Michel Dänzer | 2014-05-14 | 3 | -13/+12 |
| * | llvmpipe: Delete unneeded LLVM stuff earlier. | José Fonseca | 2014-05-14 | 7 | -34/+16 |
| * | gallivm,draw,llvmpipe: Remove support for versions of LLVM prior to 3.1. | José Fonseca | 2014-05-14 | 1 | -28/+0 |
| * | freedreno/a3xx: occlusion query support | Rob Clark | 2014-05-13 | 5 | -3/+185 |
| * | freedreno: add support for hw queries | Rob Clark | 2014-05-13 | 10 | -8/+734 |
| * | freedreno/query: allow multiple query implementations | Rob Clark | 2014-05-13 | 6 | -107/+269 |
| * | freedreno/a3xx: add point-size | Rob Clark | 2014-05-13 | 1 | -4/+14 |
| * | freedreno: update generated headers | Rob Clark | 2014-05-13 | 4 | -54/+252 |
| * | nv50,nvc0: fix blit 3d path for 1d array textures | Ilia Mirkin | 2014-05-11 | 1 | -0/+6 |
| * | nv50,nvc0: leave queries on during blit, turn them on for 2d engine | Ilia Mirkin | 2014-05-11 | 6 | -6/+35 |
| * | nv50: fix setting of texture ms info to be per-stage | Ilia Mirkin | 2014-05-11 | 3 | -6/+10 |
| * | nv50/ir: make sure to reverse cond codes on all the OP_SET variants | Ilia Mirkin | 2014-05-11 | 1 | -1/+2 |
| * | freedreno/a2xx: fix compiler warning | Rob Clark | 2014-05-11 | 1 | -1/+1 |
| * | radeonsi: prepare depth export registers at compile time | Marek Olšák | 2014-05-10 | 3 | -14/+14 |
| * | radeonsi: simplify depth/stencil export code | Marek Olšák | 2014-05-10 | 1 | -11/+5 |
| * | radeon/llvm: add support for non-scalar system values | Marek Olšák | 2014-05-10 | 1 | -0/+6 |
| * | radeonsi: add and use a helper function for loading constants | Marek Olšák | 2014-05-10 | 1 | -19/+19 |
| * | radeonsi: only count CS space for state atoms if we're going to draw | Marek Olšák | 2014-05-10 | 1 | -5/+5 |
| * | radeonsi: remove unused variable exports_ps in si_pipe_shader_ps | Marek Olšák | 2014-05-10 | 1 | -12/+1 |
| * | radeonsi: use DRAW_PREAMBLE on CIK | Marek Olšák | 2014-05-10 | 2 | -5/+10 |
| * | r600g: simplify framebuffer state size computation | Marek Olšák | 2014-05-10 | 1 | -26/+4 |
| * | radeonsi: Enable geometry shaders with LLVM 3.4.1 | Tom Stellard | 2014-05-09 | 4 | -9/+13 |
| * | radeonsi: Don't use anonymous struct trick in atom tracking | Adam Jackson | 2014-05-08 | 6 | -10/+10 |
| * | llvmpipe: change LP_MAX_SHADER_INSTRUCTIONS limit definition. | Roland Scheidegger | 2014-05-08 | 1 | -1/+3 |
| * | nv50/ir/gk110: fix set with f32 dest | Ilia Mirkin | 2014-05-07 | 1 | -0/+3 |
| * | nv50/ir: allow load propagation when flags are defined | Ilia Mirkin | 2014-05-07 | 1 | -3/+4 |
| * | gallium: add a cap for supporting 4-offset TG4 opcodes | Ilia Mirkin | 2014-05-07 | 12 | -6/+18 |
| * | svga: add switch case for PIPE_SHADER_CAP_PREFERRED_IR, remove default case | Brian Paul | 2014-05-07 | 1 | -8/+10 |
| * | radeonsi: implement ARB_texture_cube_map_array | Marek Olšák | 2014-05-06 | 3 | -6/+47 |
| * | nv50,nvc0: add X8Z24_UNORM, fix stencil-only formats | Ilia Mirkin | 2014-05-04 | 1 | -3/+9 |
| * | radeonsi: add support for Mullins asics. | Samuel Li | 2014-05-02 | 2 | -0/+9 |
| * | nouveau: add ARB_buffer_storage support | Ilia Mirkin | 2014-05-02 | 10 | -5/+112 |
| * | nouveau: remove cb_dirty, it's never used | Ilia Mirkin | 2014-05-02 | 2 | -4/+1 |
| * | nvc0: treat non-linear 2DRect textures the same as 2D | Ilia Mirkin | 2014-05-02 | 1 | -1/+1 |
| * | radeon/compute: Implement PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY | Tom Stellard | 2014-04-29 | 1 | -0/+7 |
| * | nvc0/ir: offset appears to come before the Z ref | Ilia Mirkin | 2014-04-28 | 1 | -1/+3 |
| * | nv50/ir: change texture offsets to ValueRefs, allow nonconst | Ilia Mirkin | 2014-04-28 | 8 | -20/+61 |
| * | nvc0/ir: do constant folding of extbf/insbf | Ilia Mirkin | 2014-04-28 | 1 | -1/+66 |
| * | nvc0/ir: add support for MUL_HI tgsi opcodes | Ilia Mirkin | 2014-04-28 | 1 | -1/+12 |
| * | nvc0/ir: add support for new bitfield manipulation opcodes | Ilia Mirkin | 2014-04-28 | 7 | -4/+127 |
