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* Merge branch 'master' into pipe-videoThomas Balling Sørensen2010-10-2687-2800/+4596
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| * r600g: add assembler support for all the kcache fields.Dave Airlie2010-10-263-2/+17
| * r600g: fix magic 0x1 ->flat shade enaDave Airlie2010-10-262-2/+2
| * r300g: fix texture border for 16-bits-per-channel formatsMarek Olšák2010-10-241-4/+9
| * r600g: drop more common state handling codeDave Airlie2010-10-244-151/+80
| * r600g: Also clear bc data when we're destroying a shader.Tilman Sauerbeck2010-10-243-1/+39
| * r600g: Added r600_pipe_shader_destroy().Tilman Sauerbeck2010-10-243-2/+16
| * r600g: merge more of the common r600/evergreen state handlingDave Airlie2010-10-244-172/+106
| * r600g: Fixed r600_vertex_element leak.Tilman Sauerbeck2010-10-244-18/+10
| * softpipe: remove >32bpp color restrictionBrian Paul2010-10-232-8/+1
| * softpipe: added some texture sample debug code (disabled)Brian Paul2010-10-231-7/+50
| * r300g: say no to PIPE_CAP_STREAM_OUTPUT and PIPE_CAP_PRIMITIVE_RESTARTMarek Olšák2010-10-221-0/+2
| * r300g: do not print get_param errors in non-debug buildMarek Olšák2010-10-221-4/+4
| * galahad: silence warningsBrian Paul2010-10-222-3/+3
| * llvmpipe: enable primitive restartBrian Paul2010-10-211-0/+2
| * softpipe: enable primitive restartBrian Paul2010-10-211-0/+2
| * r600g: start splitting out common code from eg/r600.Dave Airlie2010-10-216-339/+367
| * r600g: initial translate state supportDave Airlie2010-10-214-5/+250
| * llvmpipe: Remove unnecessary header.Vinson Lee2010-10-211-1/+0
| * r600g: add texture tiling enable under a debug option.Dave Airlie2010-10-211-0/+7
| * r600g: add texture tiling alignment support.Dave Airlie2010-10-211-5/+60
| * r600g: introduce a per-driver resource flag for transfers.Dave Airlie2010-10-212-2/+5
| * r600g: add r600 surface to store the aligned height.Dave Airlie2010-10-214-20/+36
| * r600g: start adding hooks for aligning width/height for tiles.Dave Airlie2010-10-211-4/+26
| * r600g: move to per-miplevel array mode.Dave Airlie2010-10-214-12/+23
| * r600g: all non-0 mipmap levels need to be w/h aligned to POT.Dave Airlie2010-10-211-5/+13
| * llvmpipe/draw: always enable LLVMAddInstructionCombiningPass()Brian Paul2010-10-201-7/+1
| * r600g: Ensure r600_src is initialized in tgsi_exp function.Vinson Lee2010-10-201-1/+1
| * llvmpipe: Initialize variable.Vinson Lee2010-10-191-0/+1
| * llvmpipe: Initialize state variable in debug_bin function.Vinson Lee2010-10-191-1/+1
| * r300g: Add new debug option for logging vertex/fragment program statsTom Stellard2010-10-184-4/+8
| * llvmpipe: Don't test rounding of x.5 numbers.José Fonseca2010-10-181-1/+4
| * llvmpipe: remove lp_setup_coef*.c files from MakefileBrian Paul2010-10-181-2/+0
| * r600g: retrieve tiling info from kernel for shared buffers.Dave Airlie2010-10-183-4/+7
| * r600g: fix transfer function for tiling.Dave Airlie2010-10-181-2/+3
| * r600g: attempt to cleanup depth blitDave Airlie2010-10-181-17/+4
| * r600g: depth needs to bound to dsDave Airlie2010-10-181-1/+1
| * r600g: fix typo in tiling setup cb code.Dave Airlie2010-10-181-1/+1
| * r600g: do proper tracking of views/samplers.Dave Airlie2010-10-183-16/+44
| * llvmpipe: remove unused arg from jit_setup_tri functionKeith Whitwell2010-10-173-6/+3
| * llvmpipe: remove unused fileKeith Whitwell2010-10-172-2/+0
| * Merge remote branch 'origin/master' into lp-setup-llvmKeith Whitwell2010-10-17142-9687/+9060
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| | * llvmpipe: fail cleanly on malloc failure in lp_setup_alloc_triangleKeith Whitwell2010-10-171-4/+4
| | * r600g: set tiling bits in hw stateDave Airlie2010-10-181-0/+5
| | * r600g: get tiling info from kernelDave Airlie2010-10-183-0/+10
| | * r600g: add defines for tilingDave Airlie2010-10-181-0/+4
| | * r600g: switch to a common formats.h file since they are in different regsDave Airlie2010-10-186-139/+121
| | * llvmpipe: Return non-zero exit code for lp_test_round failures.Vinson Lee2010-10-171-10/+9
| | * llvmpipe: Initialize bld ctx via lp_build_context_init instead of ad-hoc and ...José Fonseca2010-10-172-8/+2
| | * llvmpipe: Fix bad refactoring.José Fonseca2010-10-171-2/+1
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