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* nv50: add relocs for stack and local mem buffersChristoph Bumiller2010-09-185-3/+31
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* r600g: Remove unused variable.Vinson Lee2010-09-181-1/+0
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* nvfx: Silence uninitialized variable warnings.Vinson Lee2010-09-181-0/+2
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* nvfx: Remove const qualifer from nvfx_vertprog_translate.Vinson Lee2010-09-181-1/+1
| | | | | | Silences this GCC warning. nvfx_vertprog.c: In function 'nvfx_vertprog_translate': nvfx_vertprog.c:998: warning: assignment discards qualifiers from pointer target type
* r600g: Silence unused variable warnings.Vinson Lee2010-09-171-0/+2
| | | | The variables are used in code that is currently ifdef'ed out.
* r600g: Remove unnecessary header.Vinson Lee2010-09-171-1/+0
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* llvmpipe: Default to no threading on single processor systems.José Fonseca2010-09-171-2/+1
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* r600g: alternative command stream building from contextJerome Glisse2010-09-178-16/+4580
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Winsys context build a list of register block a register block is a set of consecutive register that will be emited together in the same pm4 packet (the various r600_block* are there to provide basic grouping that try to take advantage of states that are linked together) Some consecutive register are emited each in a different block, for instance the various cb[0-7]_base. At winsys context creation, the list of block is created & an index into the list of block. So to find into which block a register is in you simply use the register offset and lookup the block index. Block are grouped together into group which are the various pkt3 group of config, context, resource, Pipe state build a list of register each state want to modify, beside register value it also give a register mask so only subpart of a register can be updated by a given pipe state (the oring is in the winsys) There is no prebuild register list or define for each pipe state. Once pipe state are built they are bound to the winsys context. Each of this functions will go through the list of register and will find into which block each reg falls and will update the value of the block with proper masking (vs/ps resource/constant are specialized variant with somewhat limited capabilities). Each block modified by r600_context_pipe_state_set* is marked as dirty and we update a count of dwords needed to emit all dirty state so far. r600_context_pipe_state_set* should be call only when pipe context change some of the state (thus when pipe bind state or set state) Then to draw primitive you make a call to r600_context_draw void r600_context_draw(struct r600_context *ctx, struct r600_draw *draw) It will check if there is enough dwords in current cs buffer and if not will flush. Once there is enough room it will copy packet from dirty block and then add the draw packet3 to initiate the draw. The flush will send the current cs, reset the count of dwords to 0 and remark all states that are enabled as dirty and recompute the number of dwords needed to send the current context. Signed-off-by: Jerome Glisse <[email protected]>
* r600g: Fixed the shift in S_02880C_KILL_ENABLE.Tilman Sauerbeck2010-09-172-2/+2
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Enable PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED.Tilman Sauerbeck2010-09-171-2/+1
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Only set PA_SC_EDGERULE on rv770 and greater.Tilman Sauerbeck2010-09-171-2/+14
| | | | | | This is what xf86-video-ati and r600c do. Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Added DB_SHADER_CONTROL defines.Tilman Sauerbeck2010-09-174-6/+46
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Formatting fixes.Tilman Sauerbeck2010-09-171-27/+26
| | | | Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: add upload manager support.Dave Airlie2010-09-176-47/+223
| | | | | | this add support for the upload manager for uploading user vbo/index buffers. this provides a considerable speedup in q3 type games.
* r600g: add support for kernel boDave Airlie2010-09-172-0/+8
| | | | this moves to using a pb bufmgr instead of kernel bos directly.
* r600g: move constant buffer creation behind winsys abstraction.Dave Airlie2010-09-178-45/+23
| | | | this paves the way for moving to pb bufmgrs now.
* r600g: attempt to abstract kernel bos from pipe driver.Dave Airlie2010-09-1711-127/+132
| | | | | | introduce an abstraction layer between kernel bos and the winsys BOs. this is to allow plugging in pb manager with minimal disruption to pipe driver.
* r600g: hide radeon_ctx inside winsys.Dave Airlie2010-09-176-48/+22
| | | | no need for this info to be exported to pipe driver.
* gallivm: Start collecting bitwise arithmetic helpers in a new module.José Fonseca2010-09-161-2/+3
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* r300g/swtcl: fix CS overrunMarek Olšák2010-09-162-8/+28
| | | | https://bugs.freedesktop.org/show_bug.cgi?id=29901
* llvmpipe: add DEBUG_FS to dump variant informationKeith Whitwell2010-09-163-1/+3
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* llvmpipe: add LP_PERF flag to disable various aspects of rasterizationKeith Whitwell2010-09-168-6/+90
| | | | | | | | Allows disabling various operations (mainly texture-related, but will grow) to try & identify bottlenecks. Unlike LP_DEBUG, this is active even in release builds - which is necessary for performance investigation.
* nv50: get shader fixups/relocations into working stateChristoph Bumiller2010-09-164-54/+79
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* nv50: don't segfault on shaders with 0 instructionsChristoph Bumiller2010-09-161-1/+3
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* r600g: Use clamped math for RCP and RSQ.Tilman Sauerbeck2010-09-161-2/+14
| | | | | | This is likely only correct for OpenGL and not other state trackers. Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: Fixed a bo leak in r600_blit_state_ps_shader().Tilman Sauerbeck2010-09-161-1/+1
| | | | | | We would leak the newly created bo if it cannot be mapped. Signed-off-by: Tilman Sauerbeck <[email protected]>
* r600g: fix texture bos and avoid doing depth blit on evergreenDave Airlie2010-09-162-11/+4
| | | | since the depth blit code is hardcoded hex yay \o/
* r600g: fixup texture state on evergreen.Dave Airlie2010-09-164-143/+317
| | | | This whole set of state just seems wrong, another cut-n-paste nightmare.
* nv50: Fix 'control reaches end of non-void function' warning.Vinson Lee2010-09-151-0/+1
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* nv50: Silence uninitialized variable warnings.Vinson Lee2010-09-151-1/+2
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* nv50: Silence uninitialized variable warning.Vinson Lee2010-09-151-1/+2
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* nv50: Silence uninitialized variable warning.Vinson Lee2010-09-151-1/+1
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* nv50: Silence uninitialized variable warning.Vinson Lee2010-09-151-0/+1
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* nv50: Remove unnecessary headers.Vinson Lee2010-09-152-2/+0
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* nv50: Update files in SConscript to match Makefile.Vinson Lee2010-09-151-1/+8
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* r600g: add vgt dma src definesDave Airlie2010-09-162-3/+5
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* r600g: use index min/max + index buffer offset.Dave Airlie2010-09-164-5/+14
| | | | more prep work for fixing up buffer handling
* r600g: pull r600_draw struct out into headerDave Airlie2010-09-164-72/+73
| | | | we need this for future buffer rework, it also makes the vtbl easier
* nv50: use unsigned int for bitfields to silence warningsBrian Paul2010-09-152-16/+16
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* llvmpipe: s/boolean/unsigned/ in bitfield to silence warningBrian Paul2010-09-151-2/+2
| | | | | Using non-int types for bitfields is a gcc extension. The size of the struct is not effected by this change.
* llvmpipe: cast to silence warningBrian Paul2010-09-151-1/+1
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* r600g: misc cleanupJohn Doe2010-09-157-46/+47
| | | | | | | Avoid using r600_screen structure to get ptr to radeon winsys structure. Signed-off-by: Jerome Glisse <[email protected]>
* Merge remote branch 'origin/nv50-compiler'Christoph Bumiller2010-09-1523-5020/+9082
|\ | | | | | | | | | | Conflicts: src/gallium/drivers/nouveau/nouveau_class.h src/gallium/drivers/nv50/nv50_screen.c
| * nv50: put low limit on REG_ALLOC_TEMP and FP_RESULT_COUNTChristoph Bumiller2010-09-152-2/+5
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| * nv50: improve and fix modifier folding optimizationChristoph Bumiller2010-09-154-26/+46
| | | | | | | | | | | | | | Execute before folding loads, because we don't check if it's legal in lower_mods. Ensure that a value's insn pointer is updated when transferring it to a different instruction.
| * nv50: consider address register in reload eliminationChristoph Bumiller2010-09-151-7/+11
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| * nv50: fix TXP depth comparison valueChristoph Bumiller2010-09-131-16/+22
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| * nv50: fix indirect CONST access with large or negative offsetsChristoph Bumiller2010-09-132-3/+12
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| * nv50: MOV TEMP[0], -CONST[0] must be float32 negationChristoph Bumiller2010-09-131-2/+7
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| * nv50: interp cannot write flags regChristoph Bumiller2010-09-133-7/+25
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