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* llvmpipe: Remove remnants of lp_tile_soa from Makefile.José Fonseca2012-11-302-4/+0
* llvmpipe: Fix incorrect sizeof.Vinson Lee2012-11-291-2/+2
* llvmpipe: Fix build break from 75da95c50Stéphane Marchesin2012-11-291-2/+1
* r600g: mirror simplification of if/break opcodesVincent Lejeune2012-11-291-32/+12
* r600g: separate resource_id and sampler_id tex info in tgsi-to-llvmVincent Lejeune2012-11-291-0/+3
* llvmpipe: support array texturesRoland Scheidegger2012-11-296-7/+32
* llvmpipe: Remove lp_build_blend_soa()José Fonseca2012-11-295-538/+37
* llvmpipe: Eliminate color buffer swizzling.José Fonseca2012-11-2917-1334/+30
* llvmpipe: Only advertise unswizzled formats.José Fonseca2012-11-293-25/+17
* radeonsi: Bitcast result of packf16 intrinsic to float for export intrinsic.Michel Dänzer2012-11-291-1/+5
* llvmpipe: Implement logic ops for the AoS path.José Fonseca2012-11-281-1/+8
* llvmpipe: Don't use dynamically sized arrays.José Fonseca2012-11-281-4/+4
* llvmpipe: Update llvmpipe_is_format_unswizzled to reflect latest changes.James Benton2012-11-281-9/+0
* llvmpipe: Enable vertex color clamping.James Benton2012-11-281-1/+1
* llvmpipe: Unswizzled rendering.James Benton2012-11-2815-128/+1422
* gallivm: Updated lp_build_const_mask_aos to input number of channels.James Benton2012-11-282-2/+5
* radeonsi: Reinstate assertions against invalid colour/depth formats.Michel Dänzer2012-11-281-0/+2
* radeonsi: Re-enable Z16 depth buffers.Michel Dänzer2012-11-281-2/+2
* radeonsi: remove redundant parameter in r600_init_surfaceMarek Olšák2012-11-281-5/+4
* radeonsi: Use explicit stencil mipmap level offsets.Michel Dänzer2012-11-282-7/+6
* radeonsi: correct texture memory size for Z32F_S8X24Marek Olšák2012-11-281-7/+15
* radeonsi: Depth/stencil fixes.Michel Dänzer2012-11-282-8/+21
* radeonsi: Flesh out support for depth/stencil exports from the pixel shader.Michel Dänzer2012-11-282-6/+68
* radeonsi: Fix sampler views for depth textures.Michel Dänzer2012-11-282-5/+6
* radeonsi: Fix z/stencil texture creation.Jerome Glisse2012-11-281-9/+5
* gallivm,llvmpipe: handle TXF (texelFetch) instruction, including offsetsRoland Scheidegger2012-11-272-4/+9
* r600g: fix broken streamout if streamout_begin caused a context flushMarek Olšák2012-11-231-2/+6
* r600g: fix ARB_map_buffer_alignment with unaligned offsets and staging buffersMarek Olšák2012-11-223-3/+8
* r300/compiler: Avoid generating MOV instructions for invalid IMM swizzles v2Tom Stellard2012-11-161-4/+349
* radeonsi: clean up some magic numbersAlex Deucher2012-11-161-1/+2
* radeonsi: emit PA_SC_RASTER_CONFIGAlex Deucher2012-11-161-0/+11
* radeonsi: remove new asserts and replace with warningsAlex Deucher2012-11-151-2/+6
* radeonsi: cleanup si_db()Alex Deucher2012-11-152-12/+12
* radeonsi: assert the CB format is valid (v2)Alex Deucher2012-11-151-2/+3
* radeonsi: assert that the DB format is valid (v2)Alex Deucher2012-11-151-8/+5
* radeonsi: Set STENCILOPVAL fields to 1.Michel Dänzer2012-11-141-2/+4
* radeonsi: Bump SI_PM4_MAX_DW.Michel Dänzer2012-11-141-1/+1
* radeonsi: Handle TGSI TXL opcode.Michel Dänzer2012-11-141-0/+7
* radeonsi: Handle TGSI TXB opcode.Michel Dänzer2012-11-141-0/+7
* r600g: use LINEAR_ALIGNED tiling for 1D array textures and if height0 <= 3Marek Olšák2012-11-131-1/+3
* r300g: don't call buffer_unmap in draw functionsMarek Olšák2012-11-131-11/+0
* r300g: fix crash since the set_vertex_buffers(start_slot) changeMarek Olšák2012-11-131-6/+7
* r600g: untiled window-system buffers should be LINEAR_ALIGNEDMarek Olšák2012-11-131-1/+1
* r600g: use LINEAR_ALIGNED tiling for 1D texturesMarek Olšák2012-11-131-1/+2
* r600g: use LINEAR_ALIGNED tiling for staging textures, reorder the codeMarek Olšák2012-11-131-6/+10
* r600g: remove redundant parameter in r600_init_surfaceMarek Olšák2012-11-131-6/+4
* gallivm,draw,llvmpipe: use base ptr + mip offsets instead of mip pointersRoland Scheidegger2012-11-126-38/+83
* llvmpipe: always allocate whole miptrees not individual levelsRoland Scheidegger2012-11-122-60/+81
* radeonsi: Implement alpha testing in pixel shader.Michel Dänzer2012-11-126-38/+52
* radeonsi: Initialize uses_kill boolean from TGSI info.Michel Dänzer2012-11-121-0/+1
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