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* freedreno/ir3: large const supportRob Clark2014-10-155-13/+33
* freedreno: update generated headersRob Clark2014-10-154-5/+10
* freedreno: fix layer_strideRob Clark2014-10-151-1/+1
* freedreno: inline fd_draw_emit()Rob Clark2014-10-152-49/+47
* freedreno/ir3: optimize shader key comparisionRob Clark2014-10-155-40/+79
* freedreno/a3xx: refactor/optimize emitRob Clark2014-10-157-83/+125
* freedreno/a3xx: refactor vertex state emitRob Clark2014-10-1511-79/+83
* vc4: Fix the uniform debug output.Eric Anholt2014-10-151-1/+1
* vc4: Add support for user clip plane and gl_ClipVertex.Eric Anholt2014-10-155-4/+91
* vc4: Move the output semantics setup to a helper.Eric Anholt2014-10-151-16/+28
* r600g,radeonsi: Only set use_staging_texture = TRUE onceMichel Dänzer2014-10-151-8/+5
* r600g,radeonsi: Use staging texture for transfers if any miplevel is tiledMichel Dänzer2014-10-151-1/+1
* freedreno: use tgsi_loweringRob Clark2014-10-148-1673/+6
* r300/compiler: remove useless checkDavid Heidelberger2014-10-141-5/+2
* automake: explicitly set TARGET_RADEON_{WINSYS,COMMON}Emil Velikov2014-10-143-5/+5
* vc4: Fix render target NPOT alignment at small miplevels.Eric Anholt2014-10-141-3/+12
* vc4: Add support for having 0 vertex elements used.Eric Anholt2014-10-142-6/+47
* ilo: clear writer pointer after unmappingChia-I Wu2014-10-141-0/+1
* vc4: Write the VPM read setup multiple times to queue all the inputs.Eric Anholt2014-10-131-3/+18
* vc4: Add support for the TXL opcode.Eric Anholt2014-10-131-5/+15
* vc4: Improve the accuracy of SIN and COS.Eric Anholt2014-10-131-11/+17
* vc4: Match VS outputs to FS inputs.Eric Anholt2014-10-133-18/+135
* vc4: Add support for the CEIL opcode.Eric Anholt2014-10-131-0/+22
* vc4: Add support for the SSG opcode.Eric Anholt2014-10-131-0/+12
* r600g: Implement GL_ARB_sample_shadingGlenn Kennard2014-10-1210-119/+383
* radeonsi: use tgsi_shader_info in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-71/+61
* radeonsi: remove si_shader_output_values::indexMarek Olšák2014-10-121-17/+6
* radeonsi: use tgsi_shader_info in si_llvm_emit_vs_epilogueMarek Olšák2014-10-121-26/+13
* radeonsi: remove shader->input[] and output[] arrays and dependenciesMarek Olšák2014-10-123-89/+2
* radeonsi: move param_offset out of shader->input[] and output[]Marek Olšák2014-10-123-7/+10
* radeonsi: use tgsi_shader_info to get a list of GS outputsMarek Olšák2014-10-122-14/+12
* radeonsi: use tgsi_shader_info in si_update_spi_mapMarek Olšák2014-10-121-9/+13
* radeonsi: simplify dereferences in si_update_spi_mapMarek Olšák2014-10-121-2/+2
* radeonsi: use tgsi_shader_info in si_shader_vsMarek Olšák2014-10-121-2/+3
* radeonsi: use tgsi_shader_info in si_shader_psMarek Olšák2014-10-123-5/+5
* radeonsi: use tgsi_shader_info in fetch_input_gsMarek Olšák2014-10-121-4/+5
* radeonsi: don't rely on shader->output in si_llvm_emit_fs_epilogueMarek Olšák2014-10-121-1/+1
* radeonsi: use tgsi_shader_info in si_llvm_emit_es_epilogueMarek Olšák2014-10-121-17/+5
* radeonsi: don't recompile shaders when changing nr_cbufs from 0 to 1Marek Olšák2014-10-123-4/+4
* radeonsi: remove vs.ucps_enabled from the shader keyMarek Olšák2014-10-123-15/+0
* radeonsi: assume ClipDistance usage mask is always 0xfMarek Olšák2014-10-122-8/+2
* ilo: disassemble compacted instructionsChia-I Wu2014-10-114-2/+453
* vc4: Use the fnv1 hash function instead of gallium util's crc32.Eric Anholt2014-10-101-2/+3
* vc4: Don't look up the compiled shaders unless state has changed.Eric Anholt2014-10-103-0/+28
* vc4: Actually clear the context's dirty flags.Eric Anholt2014-10-101-0/+1
* vc4: Optimize the other case of SEL_X_Y wih a 0 -> SEL_X_0(a).Eric Anholt2014-10-101-1/+23
* vc4: Optimize out adds of 0.Eric Anholt2014-10-091-0/+26
* vc4: Optimize fmul(x, 0) and fmul(x, 1).Eric Anholt2014-10-091-0/+45
* vc4: Factor out the turn-it-into-a-mov in opt_algebraic.Eric Anholt2014-10-091-10/+12
* vc4: Eliminate unused texture instructions.Eric Anholt2014-10-091-1/+21
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