| Commit message (Collapse) | Author | Age | Files | Lines |
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Conflicts:
src/gallium/tests/unit/u_format_test.c
src/gallium/winsys/r600/drm/r600_hw_context.c
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GLOBAL_GPR regs should be 0. Need to set the
number of temp regs in SQ_GPR_RESOURCE_MGMT_1.
Signed-off-by: Alex Deucher <[email protected]>
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need more sleep or something.
Signed-off-by: Dave Airlie <[email protected]>
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So only with kernel version 2.7 can this work, thanks to Alex
for pointing that out. Also add a workaround for a hw bug.
Signed-off-by: Dave Airlie <[email protected]>
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Evergreen can do this as well as cayman, so we should enable it.
This fixes a gpu lockup with
glsl-vs-vec4-indexing-temp-dst-in-nested-loop-combined.shader_test
I need to add a better workaround for r600/r700.
Signed-off-by: Dave Airlie <[email protected]>
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Signed-off-by: Dave Airlie <[email protected]>
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Since resources don't generally vary in size, this splits
the emit path, it also takes into a/c that texture and vertex resources
have different number of relocs, and avoids emitting the extra
reloc for vertex resources.
Signed-off-by: Dave Airlie <[email protected]>
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This relies on the reference member being first, so document it.
Signed-off-by: Dave Airlie <[email protected]>
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Not sure why these were included originally.
Signed-off-by: Alex Deucher <[email protected]>
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Use the new PCI ID table, make it simpler.
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Wondering why r600g needs to include r300_pci_ids.h
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At the end of flushing we were scanning over 450 blocks
with generally about 50 enabled. This reduces the scanning
to just the list of enabled blocks.
Signed-off-by: Dave Airlie <[email protected]>
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There isn't much point taking the overhead of range/block lookups on resources
we aren't going to be getting resource registers at wierd offsets.
Signed-off-by: Dave Airlie <[email protected]>
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resource setting could be a fair bit more lightweight,
this patch just separates the resource structs from the standard
reg tracking structs in the driver, later patches will improve
the winsys.
Signed-off-by: Dave Airlie <[email protected]>
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With complex shaders there are often "holes" in the fs inputs, and we only
have 8 tex coorsd to map those to. To fix this, we remap fs inputs to [0..8].
This lets us to run many more GLSL programs.
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This allows setting the path to the C++ compiler.
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Reference implementation which produces high quality renderings.
Based on Higher Quality Elliptical Weighted Avarage Filter (EWA).
Signed-off-by: Brian Paul <[email protected]>
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num_samplers is array of 3 elements, not 5
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This updates the spi state after ps/vs binding or rasteriser state
change.
Signed-off-by: Dave Airlie <[email protected]>
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This is a lot more branch predictor friendly, it actually
showed up in cachegrind profiles.
Signed-off-by: Dave Airlie <[email protected]>
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These are handled separately in the winsys, so don't need the calculations
done at this point. this manifested as a crash in point-sprite,
Thanks to XoD on #radeon for pointing it out.
Signed-off-by: Dave Airlie <[email protected]>
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The flush function, when asked for, should not return a NULL fence.
NULL can only be returned if fences are not implemented, and st/mesa
doesn't call any of the fence functions if it receives a NULL fence
(because some drivers don't even set the fence hooks).
ARB_sync is exposed if fence_finish is set.
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This modifies the VGT state and move the SPI setup to its own discrete state.
It then just sets the SPI state up and the VGT state up once and modifies
them thereafter.
Signed-off-by: Dave Airlie <[email protected]>
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This splits the initialisation and the setting of values in the resource
buffers. We only should end up initialising once and updateing with new values
when needed.
Signed-off-by: Dave Airlie <[email protected]>
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This moves the overhead of working out the range/block to state build time,
it also allows the compiler to use constants for a lot of things instead
of working them out each time.
Signed-off-by: Dave Airlie <[email protected]>
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This is going to get too big to be a forced inline. Also going to remove it
from some hotpaths.
Signed-off-by: Dave Airlie <[email protected]>
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This moves the functions down the file, and also adds a ctx parameter.
This is precursor patch just moving stuff around and getting it ready.
Signed-off-by: Dave Airlie <[email protected]>
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this is just an precursor change for some later patches.
Signed-off-by: Dave Airlie <[email protected]>
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This drop the r600_draw_vbo CPU usage on a run of nexuiz from 1.40% to 0.72%
in sysprof for me on my Fusion APU.
Signed-off-by: Dave Airlie <[email protected]>
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And renumber the options.
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Signed-off-by: Alex Deucher <[email protected]>
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The pitch of 4 is allowed for squared microtiling only.
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Fixes piglit:
- NV_conditional_render/clear
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From now on, depth test is always enabled in hardware.
If depth test is disabled in Gallium, the hardware Z function is set to ALWAYS.
If there is no zbuffer set, the colorbuffer0 memory is set as a zbuffer
to silence the CS checker.
This fixes piglit:
- occlusion-query-discard
- NV_conditional_render/bitmap
- NV_conditional_render/drawpixels
- NV_conditional_render/vertex_array
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