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* ilo: preliminary GEN 7.5 supportChia-I Wu2013-09-0810-107/+236
* r600g: remove DMA paddingAlex Deucher2013-09-061-9/+0
* gallium, intel: Implements new __DRI_IMAGE_USE_LINEAR and PIPE_BIND_LINEAR fl...Axel Davy2013-09-067-6/+17
* i915g: Document fall-through switchStéphane Marchesin2013-09-061-4/+3
* i915g: Handle i915->batch == NULL correctly in flushStéphane Marchesin2013-09-061-1/+4
* i915g: Remove useless comparisonStéphane Marchesin2013-09-061-3/+2
* i915g: Fix initial array indexStéphane Marchesin2013-09-061-1/+1
* r600g/compute: Fix bug in compute memory poolTom Stellard2013-09-051-7/+2
* r600g/compute: Don't flush the cs in pipe_context::launch_grid()Tom Stellard2013-09-051-10/+1
* nv30: fix inconsistent setting of push->user_privIlia Mirkin2013-09-051-1/+1
* i915g: Implement writemask fixupStéphane Marchesin2013-09-043-38/+90
* i915g: Stop calling draw_prepare_shader_outputsStéphane Marchesin2013-09-041-2/+0
* i915g: Add more optimizationsStéphane Marchesin2013-09-043-58/+371
* radeonsi: Don't save/restore FMASK sampler view states for u_blitterMichel Dänzer2013-09-021-1/+2
* radeonsi: Expose pure integer vertex formatsMichel Dänzer2013-09-021-1/+6
* nvc0: restore viewport after blitMaarten Lankhorst2013-09-023-4/+7
* radeon/uvd: save the aligned width & heightChristian König2013-09-021-0/+2
* nvc0: delete compute object on screen destructionChristoph Bumiller2013-09-011-0/+1
* nvc0: fix blitctx memory leakJoakim Sindholt2013-09-013-0/+9
* nvc0: don't use bufctx in nvc0_cb_pushChristoph Bumiller2013-09-011-7/+3
* nvc0: clear the flushed flagChristoph Bumiller2013-09-011-5/+4
* nvc0/ir: add f32 long immediate cannot saturateChristoph Bumiller2013-09-011-0/+12
* nvc0/ir: fix use after free in texture barrier insertion passTiziano Bacocco2013-09-011-1/+2
* nv30: find first unused texcoord rather than bailing if first is usedIlia Mirkin2013-09-011-2/+1
* nouveau: initialise the nouveau_transfer mapsEmil Velikov2013-09-011-0/+2
* radeonsi: simplify and improve flushingMarek Olšák2013-08-3112-140/+125
* radeonsi: convert constant buffers to si_descriptorsMarek Olšák2013-08-315-128/+162
* radeonsi: use r600_common_context, r600_common_screen, r600_resourceMarek Olšák2013-08-3128-777/+338
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-3127-1486/+1825
* radeonsi: cleanup initialization of SGPR shader parametersMarek Olšák2013-08-311-13/+19
* r600g,radeonsi: remove unused variablesMarek Olšák2013-08-312-8/+0
* radeonsi: Do not suspend timer queriesNiels Ole Salscheider2013-08-306-14/+30
* softpipe: handle NULL sampler views for texture sampling / queriesRoland Scheidegger2013-08-301-5/+25
* softpipe: check if so_target is NULL before accessing itRoland Scheidegger2013-08-301-2/+5
* r600g: enable SB backend by defaultVadim Girlin2013-08-304-5/+6
* r600g: fix color exports when we have no CBsVadim Girlin2013-08-301-3/+4
* nvc0/ir: Initialize NVC0LegalizePostRA member variables.Vinson Lee2013-08-291-1/+3
* radeonsi: Early return if no depth or stencil on release builds.Vinson Lee2013-08-291-0/+1
* freedreno: updates for msm drm/kms driverRob Clark2013-08-298-30/+55
* freedreno/a3xx/compiler: handle sync flags betterRob Clark2013-08-291-16/+34
* freedreno/a3xx/compiler: better const handlingRob Clark2013-08-291-90/+121
* radeonsi: Make sure libdrm_radeon headers are picked up from the right placeJonathan Gray2013-08-291-1/+2
* radeon/uvd: fix MPEG2/4 ref frame index limitChristian König2013-08-291-2/+2
* nouveau: Copy m4x4 and m8x8 separately.Vinson Lee2013-08-281-1/+2
* r300g: enable MSAA on r300-r400, be careful about using color compressionMarek Olšák2013-08-274-5/+14
* draw: clean up setting stream out information a bitRoland Scheidegger2013-08-276-29/+37
* llvmpipe: support nested/overlapping queries for all query typesRoland Scheidegger2013-08-273-18/+20
* softpipe: support nested/overlapping queries for all query typesRoland Scheidegger2013-08-272-18/+17
* svga: replace 0 with PIPE_OK in a few placesBrian Paul2013-08-263-5/+5
* radeonsi: Also set the depth component mask bit for stencil-only exportsMichel Dänzer2013-08-261-1/+4
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