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* etnaviv: gallium driver for Vivante GPUsThe etnaviv authors2017-01-1261-0/+14672
* Always defer memory free in swr_resource_destroyGeorge Kyriazis2017-01-121-12/+5
* nvc0: enable GL 4.3 on gm107+Samuel Pitoiset2017-01-121-7/+4
* nvc0: use sched control codes for gm107 MP counters codeSamuel Pitoiset2017-01-121-44/+44
* nvc0: use sched control codes for gm107 blitter shaderSamuel Pitoiset2017-01-121-6/+14
* nv50/ir: use sched control codes for gm107 builtinsSamuel Pitoiset2017-01-122-40/+40
* nv50/ir: improve instruction pipelining on gm107Samuel Pitoiset2017-01-123-4/+1027
* nv50/ir: do not insert texture barriers on gm107Samuel Pitoiset2017-01-121-1/+2
* radeonsi: num_records is in units of stride for swizzled buffers even on VINicolai Hähnle2017-01-121-2/+0
* freedreno: add "nogrow" debug paramRob Clark2017-01-103-1/+4
* freedreno/a5xx: remove hack for glamorRob Clark2017-01-101-3/+0
* freedreno/a5xx: fixed instancedRob Clark2017-01-101-0/+1
* freedreno/a5xx: use the non-_ZERO_BASE for vertexidRob Clark2017-01-104-6/+20
* freedreno/a5xx: add texture MIPLVLSRob Clark2017-01-101-3/+3
* freedreno/a5xx: fix fragcoord related hangsRob Clark2017-01-102-2/+6
* freedreno: update generated headersRob Clark2017-01-106-13/+22
* ac/debug: Dump indirect buffers.Bas Nieuwenhuizen2017-01-091-3/+6
* ac/debug: Move IB decode to common code.Bas Nieuwenhuizen2017-01-093-332/+15
* ac/debug: Move sid_tables.h generation to common code.Bas Nieuwenhuizen2017-01-093-308/+1
* radeonsi: fix the Witcher 2 black transitionsMarek Olšák2017-01-091-2/+13
* radeonsi: set si_shader_context::input_decls for ranged decls correctlyMarek Olšák2017-01-091-1/+4
* radeonsi: cleanly communicate whether si_shader_dump should check R600_DEBUGMarek Olšák2017-01-095-13/+15
* gallium/radeon: use the internal clear_buffer callback to fix r600gMarek Olšák2017-01-061-1/+3
* llvmpipe: do transpose/untwiddle after conversion for 8bit formatsRoland Scheidegger2017-01-061-7/+143
* llvmpipe: use alpha from already converted color if possibleRoland Scheidegger2017-01-062-18/+54
* llvmpipe: use scalar load instead of vectors for small vectors in fs backendRoland Scheidegger2017-01-061-6/+50
* radeonsi: add TC L2 prefetch for shaders and VBO descriptorsMarek Olšák2017-01-063-1/+50
* radeonsi: add CP DMA flags for greater control over synchronizationMarek Olšák2017-01-063-16/+31
* radeonsi: cleanly communicate which CP DMA packet is firstMarek Olšák2017-01-061-11/+21
* gallium/radeon: add new HUD query num-SDMA-IBsMarek Olšák2017-01-063-0/+6
* gallium/radeon: rename the num-ctx-flushes query to num-GFX-IBsMarek Olšák2017-01-063-6/+6
* radeonsi: add HUD queries for cache flush statsMarek Olšák2017-01-064-0/+32
* radeonsi: don't count fast clears and prefetches into CP DMA statsMarek Olšák2017-01-061-2/+6
* radeonsi: don't wait for compute shaders in texture_barrierMarek Olšák2017-01-061-2/+1
* radeonsi: assume that a TES without POSITION precedes GSMarek Olšák2017-01-061-1/+2
* radeonsi: unduplicate VS color export codeMarek Olšák2017-01-061-9/+2
* radeonsi: clean up more HAVE_LLVM #ifdefsMarek Olšák2017-01-062-13/+20
* gallium/radeon: clean up HAVE_LLVM #ifdefs in r600_get_llvm_processor_nameMarek Olšák2017-01-061-17/+11
* swr: [rasterizer core] rename OutputMerger functionsTim Rowley2017-01-062-9/+9
* swr: [rasterizer core] fix SIMD16 Transpose_16_16Tim Rowley2017-01-061-2/+2
* swr: [rasterizer core] fix SIMD16 output mergerTim Rowley2017-01-062-16/+22
* swr: [rasterizer core] fix SIMD16 PackTraits pack() and unpack()Tim Rowley2017-01-063-48/+82
* swr: [rasterizer core] fix SIMD16 transpose functionsTim Rowley2017-01-063-113/+225
* swr: [rasterizer core] whitespace adjustmentsTim Rowley2017-01-061-2/+1
* vc4: Rewrite T image handling based on calling the LT handler.Eric Anholt2017-01-051-34/+75
* vc4: Move the utile_width/height functions to header inlines.Eric Anholt2017-01-052-37/+36
* vc4: Make the load/store utile functions static.Eric Anholt2017-01-052-4/+2
* vc4: Simplify the load/store utile functions.Eric Anholt2017-01-051-10/+22
* vc4: Reuse a list function to simplify bufmgr code.Eric Anholt2017-01-051-11/+2
* vc4: Flush the job early if we're referencing too many BOs.Eric Anholt2017-01-053-0/+16
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