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* nvc0: release 3d bufctx after drawingBen Skeggs2013-11-131-0/+3
| | | | Signed-off-by: Ben Skeggs <[email protected]>
* draw,llvmpipe: use exponent manipulation instead of exp2 for polygon offsetRoland Scheidegger2013-11-121-11/+15
| | | | | | | | | | Since we explicitly require a integer input we should avoid using exp2 math (even if we were using optimized versions), which turns the exp2 into a int sub (plus some casts). v2: fix bogus uint (needs to be int) math spotted by Matthew, fix comments Reviewed-by: Jose Fonseca <[email protected]>
* nouveau/video: mark bitstream-level acceleration as unsupportedIlia Mirkin2013-11-121-2/+2
| | | | | | | | | | Adding a vl_mpeg-based helper didn't seem to work, as it produced data that the card couldn't handle. (And I didn't investigate further.) This makes the decoding functionality only accessible via XvMC and avoids crashes when attempting to use VDPAU. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.0" <[email protected]>
* nouveau/video: don't try on nv3xIlia Mirkin2013-11-121-2/+2
| | | | | | | | It doesn't work, I don't know why, but no point in hanging people's displays until it gets figured out. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "10.0" <[email protected]>
* radeonsi/compute: Add Sea Islands supportTom Stellard2013-11-111-3/+12
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* r600/llvm: Store inputs in function argumentsVincent Lejeune2013-11-113-0/+121
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* svga: improve loops over color buffersBrian Paul2013-11-116-10/+20
| | | | | | | Only loop over the actual number of color buffers supported, not PIPE_MAX_COLOR_BUFS. Reviewed-by: José Fonseca <[email protected]>
* svga: document magic number of 8 render targets per batchBrian Paul2013-11-111-1/+13
| | | | | Grab the comments from commit message b84b7f19dfdc0 to explain what the code is doing.
* r600g: Add support for PIPE_FORMAT_R11G11B10_FLOAT vertex elementsFredrik Höglund2013-11-072-0/+9
| | | | | Reviewed-by: Dave Airlie <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* svga: always return 4 for PIPE_MAX_COLOR_BUFSBrian Paul2013-11-071-5/+4
| | | | | | Even if the query returns 8, only 4 really work. Reviewed-by: José Fonseca <[email protected]>
* svga: return true for the PIPE_CAP_SM3 queryBrian Paul2013-11-071-1/+3
| | | | | | | | | | This just tells the state tracker to turn on the GL_ARB_shader_texture_lod extension. This simply allows the GLSL compiler to emit TXL and TXD instructions for both vertex and fragment shaders. We already support these opcodes in the svga driver. Though, the shadow2DGrad() Piglit tests are failing. Reviewed-by: José Fonseca <[email protected]>
* draw,llvmpipe,util: add depth bias calculation for arb_depth_buffer_floatMatthew McClure2013-11-077-37/+102
| | | | | | | | | | | | | | | With this patch, the llvmpipe and draw modules will calculate the depth bias according to floating point depth buffer semantics described in the arb_depth_buffer_float specification, when the driver has a z buffer bound with a format type of UTIL_FORMAT_TYPE_FLOAT. By default, the driver will use the existing UNORM calculation for depth bias. A new function, draw_set_zs_format, was added to calculate the Minimum Resolvable Depth value and floating point depth sense for the draw module. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Roland Scheidegger <[email protected]>
* r600/compute: silence unused var warningFabio Pedretti2013-11-061-1/+0
| | | | Reviewed-by: Marek Olšák <[email protected]>
* r600/llvm: Fix isampleBuffer on preEGVincent Lejeune2013-11-061-1/+14
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* r600/llvm: Fix texbuf for pre EG genVincent Lejeune2013-11-061-0/+29
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* r600g: properly unbind a DSA state being deleted in r600_delete_dsa_stateMarek Olšák2013-11-042-2/+9
| | | | Tested-by: Christian König <[email protected]>
* radeonsi: implement ARB_vertex_type_2_10_10_10_revMarek Olšák2013-11-041-0/+7
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* r600g,radeonsi: properly expose texture buffer formatsMarek Olšák2013-11-043-9/+24
| | | | This exposes GL_ARB_texture_buffer_object_rgb32.
* radeonsi: implement texture buffer objectsMarek Olšák2013-11-043-54/+137
| | | | GLSL 1.40 is done.
* radeonsi: report our border color behaviorMarek Olšák2013-11-041-1/+3
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* radeonsi: bind a dummy constant buffer in place of NULL buffersMarek Olšák2013-11-043-0/+29
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* radeonsi: implement uniform buffer objectsMarek Olšák2013-11-044-31/+41
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* radeonsi: try to fix IA_MULTI_VGT_PARAM programmingMarek Olšák2013-11-043-2/+8
| | | | This doesn't make any difference on Bonaire, but it might help on Hawaii.
* freedreno/a3xx/texture: min/max lodRob Clark2013-11-011-5/+3
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: update envytools headersRob Clark2013-11-014-8/+22
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix VS out / FS in linkingRob Clark2013-11-013-7/+47
| | | | | | | | Actually link VS out / FS in based on semantic info, keeping in mind that position/pointsize can also be an input to the FS. This fixes a few fragment shaders which were using gl_Position. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: allow num_samplers != num_texturesRob Clark2013-11-012-56/+55
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: highp frag shaderRob Clark2013-11-014-12/+14
| | | | | | | | | | | | | | Fixes use of full-precision in fragment shader (ie. don't clobber r0.x since that can be used by future bary instructions for varying fetch). And makes use of full-precision the default in fragment shader (but can be overriden via FD_MESA_DEBUG=fraghalf). Seems like half precision is often not enough for texture coordinates. The blob compiler is clever enough to keep texture coords in full precision registers while using half precision for everything else. But we aren't quite that clever yet, so better to default to full precision. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: relative addressing fixes.Rob Clark2013-11-011-28/+48
| | | | | | | Handle some relative addressing constraints: cannot handle const or relative in cat5 and src2 of cat3. Signed-off-by: Rob Clark <[email protected]>
* freedreno: we do actually support sqrtRob Clark2013-11-012-0/+8
| | | | Signed-off-by: Rob Clark <[email protected]>
* radeonsi: Allow longer intrinsic namesKai Wasserbäch2013-10-301-1/+1
| | | | | | | | | | | Fixes a boat load of Piglit tests for me, which crashed like fdo#70913 before. Thanks to Michel Dänzer for the tip. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=70913 Signed-off-by: Kai Wasserbäch <[email protected]> Reviewed-by: Tom Stellard <[email protected]>
* radeon/llvm: Specify the DataLayout when running optimizationsTom Stellard2013-10-301-0/+4
| | | | | Without DataLayout, a lot of optimization passes aren't run and the ones that are don't work as well.
* ilo: Fix out-of-tree build.Johannes Obermayr2013-10-301-1/+1
| | | | [olv: use $(srcdir) instead of $(top_srcdir)]
* freedreno: emulated unsupported primitive typesRob Clark2013-10-295-25/+74
| | | | | | | Use u_primconvert to convert unsupported primitives into supported primitive plus index buffer. Signed-off-by: Rob Clark <[email protected]>
* gallium/auxiliary/indices: add start paramRob Clark2013-10-292-2/+2
| | | | | | | Add 'start' parameter to generator/translator. Signed-off-by: Rob Clark <[email protected]> Reviewed-by: Brian Paul <[email protected]>
* freedreno: update generated headersRob Clark2013-10-296-125/+238
| | | | | | pull in some fixes to draw-initiator/prim-type. Signed-off-by: Rob Clark <[email protected]>
* llvmpipe: fix bogus layer clamping in setupRoland Scheidegger2013-10-292-8/+25
| | | | | | | | | | | | | | | | | | | | | The layer coming from GS needs to be clamped (not sure if that's actually the correct error behavior but we need something) as the number can be higher than the amount of layers in the fb. However, this code was using the layer calculation from the scene, and this was actually calculated in lp_scene_begin_rasterization() hence too late (so setup was using the value from the _previous_ scene or just zero if it was the first scene). Since the value is used in both rasterization and setup, move calculation up to lp_scene_begin_binning() though it's a bit more inconvenient to calculate there. (Theoretically could move _all_ code which was in lp_scene_begin_rasterization() to there, because ever since we got rid of swizzled render/depth buffers our "map" functions preparing the fb data for render don't actually change the data in there at all, but it feels like it would be a hack.) v2: improve comments Reviewed-by: Brian Paul <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* util,llvmpipe: correctly set the minimum representable depth valueMatthew McClure2013-10-291-19/+12
| | | | | Reviewed-by: Roland Scheidegger <[email protected]> Reviewed-by: Jose Fonseca <[email protected]>
* svga: reindent drawing codeBrian Paul2013-10-293-266/+199
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* r600g/sb: fix value::is_fixed()Vadim Girlin2013-10-291-2/+2
| | | | | | | | | | | This prevents unnecessary (and wrong) register allocation in the scheduler for preloaded values in fixed registers. Fixes interpolation-mixed.shader_test on rv770 (and probably on all other pre-evergreen chips). Signed-off-by: Vadim Girlin <[email protected]> Tested-by: Andreas Boll <[email protected]>
* vl/h264: split fields into SPS/PPSChristian König2013-10-285-80/+79
| | | | | | Add alot of missing fields as well. Signed-off-by: Christian König <[email protected]>
* radeon/uvd: fix H264 chroma format handlingChristian König2013-10-281-1/+15
| | | | Signed-off-by: Christian König <[email protected]>
* ilo: minor cleanups for recent interface changesChia-I Wu2013-10-283-156/+9
| | | | | Kill ilo_bind_sampler_states2 and ilo_set_sampler_views2. Map PIPE_FORMAT_R10G10B10A2_UINT to BRW_SURFACEFORMAT_R10G10B10A2_UINT.
* gallium: add PIPE_CAP_MIXED_FRAMEBUFFER_SIZESIlia Mirkin2013-10-2612-0/+12
| | | | | | | | | This CAP will determine whether ARB_framebuffer_object can be enabled. The nv30 driver does not allow mixing swizzled and linear zsbuf/cbuf textures. Signed-off-by: Ilia Mirkin <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* r600g,radeonsi: use fences provided by the winsysMarek Olšák2013-10-258-462/+37
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* winsys/radeon: add the implementation of fences from r300gMarek Olšák2013-10-252-33/+8
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* radeonsi: add the vertex shader position output if it's missingMarek Olšák2013-10-251-0/+13
| | | | | | This fixes a lockup in piglit/spec/glsl-1.40/execution/tf-no-position. Reviewed-by: Michel Dänzer <[email protected]>
* radeonsi: respect semantic indices for COLOR[i] fragment shader outputsMarek Olšák2013-10-251-5/+2
| | | | Reviewed-by: Michel Dänzer <[email protected]>
* freedreno/a3xx/compiler: relative addressingRob Clark2013-10-241-1/+123
| | | | Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx: fix const/rel/const-rel encodingRob Clark2013-10-244-88/+300
| | | | | | | | | | | | | | | | | | | | | | | | The encoding of constant, relative, and relative-const src registers is a bit more complex than originally thought, which gives an extra bit to encode const reg # at expense of taking a bit from relative offset. In most cases a3xx seems to actually use a scheme whereby it can encode an extra bit for const register. You have three possible encodings in thirteen bits: register: (11 bits for N.c) 00........... rN.c relative: (10 bits for N) 010.......... r<a0.x + N> 011.......... c<a0.x + N> const: (12 bits for N.c) 1............ cN.c Which means we can deal w/ more consts than previously thought. Signed-off-by: Rob Clark <[email protected]>
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