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* radeon/uvd: use more sane defaults for bitstream buffer sizeChristian König2013-09-121-1/+3
| | | | | Signed-off-by: Christian König <[email protected]> Reviewed-by: Alex Deucher <[email protected]>
* trace: Support bigger TGSI shaders.José Fonseca2013-09-121-1/+1
| | | | Trivial.
* Move nv30, nv50 and nvc0 to nouveau.Johannes Obermayr2013-09-11160-638/+430
| | | | | | | | | | | | | | | | It is planned to ship openSUSE 13.1 with -shared libs. nouveau.la, nv30.la, nv50.la and nvc0.la are currently LIBADDs in all nouveau related targets. This change makes it possible to easily build one shared libnouveau.so which is then LIBADDed. Also dlopen will be faster for one library instead of three and build time on -jX will be reduced. Whitespace fixes were requested by 'git am'. Signed-off-by: Johannes Obermayr <[email protected]> Acked-by: Christoph Bumiller <[email protected]> Acked-by: Ian Romanick <[email protected]>
* radeonsi: Add parentheses around '|' operands.Vinson Lee2013-09-101-1/+1
| | | | | | | | | | | | | | Fixes GCC parentheses warning. r600_texture.c: In function 'si_texture_create': r600_texture.c:518:20: warning: suggest parentheses around arithmetic in operand of '|' [-Wparentheses] !(templ->bind & PIPE_BIND_CURSOR | PIPE_BIND_LINEAR)) { ^ Fixes "Wrong operator used" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* ilo: preliminary GEN 7.5 supportChia-I Wu2013-09-0810-107/+236
| | | | | This is based on grepping for brw->is_haswell in i965 to see how GEN 7.5 differs from GEN 7. Slightly tested with Xonotic and some Mesa demos.
* r600g: remove DMA paddingAlex Deucher2013-09-061-9/+0
| | | | | | | This is now handled in the winsys. Reviewed-by: Marek Olšák <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
* gallium, intel: Implements new __DRI_IMAGE_USE_LINEAR and PIPE_BIND_LINEAR ↵Axel Davy2013-09-067-6/+17
| | | | | | flags to enforce no tiling. Signed-off-by: Axel Davy <[email protected]>
* i915g: Document fall-through switchStéphane Marchesin2013-09-061-4/+3
| | | | Fixes warning reported by Coverity.
* i915g: Handle i915->batch == NULL correctly in flushStéphane Marchesin2013-09-061-1/+4
| | | | Fixes warning reported by Coverity.
* i915g: Remove useless comparisonStéphane Marchesin2013-09-061-3/+2
| | | | Fixes "Macro compares unsigned to 0" defect reported by Coverity.
* i915g: Fix initial array indexStéphane Marchesin2013-09-061-1/+1
| | | | Fixes "Out-of-bounds read" defect reported by Coverity.
* r600g/compute: Fix bug in compute memory poolTom Stellard2013-09-051-7/+2
| | | | | | | When adding a new buffer to the beginning of the memory pool, we were accidentally deleting the buffer that was first in the buffer list. This was caused by a bug in the memory pool's linked list implementation.
* r600g/compute: Don't flush the cs in pipe_context::launch_grid()Tom Stellard2013-09-051-10/+1
| | | | | | This is the state tracker's responsibility. Reviewed-by: Marek Olšák <[email protected]>
* nv30: fix inconsistent setting of push->user_privIlia Mirkin2013-09-051-1/+1
| | | | | | | It's set to &nv30->bufctx everywhere else. Signed-off-by: Ilia Mirkin <[email protected]> Cc: "9.2" <[email protected]>
* i915g: Implement writemask fixupStéphane Marchesin2013-09-043-38/+90
| | | | | | | | | The fixup code emulates non-BGRA render targets by adding an extra instruction at the end of fragment shaders to swizzle the output. To do this, we also swizzle the blend function. However an oversight until now was that the writemask wasn't getting swizzled. This patch fixes that which fixes a bunch of piglit tests.
* i915g: Stop calling draw_prepare_shader_outputsStéphane Marchesin2013-09-041-2/+0
| | | | | It's not useful on i915g since we don't support primid. Fixes piglit point tests on i915g.
* i915g: Add more optimizationsStéphane Marchesin2013-09-043-58/+371
| | | | | | | | | This patch adds liveness analysis to i915g and a couple optimizations which benefit from it. One interesting optimization turns (fake) indirect texture accesses into direct texture accesses (the i915 supports a maximum of 4 indirect texture accesses). Among other things this fixes a bunch of piglit tests.
* radeonsi: Don't save/restore FMASK sampler view states for u_blitterMichel Dänzer2013-09-021-1/+2
| | | | | | | Fixes assertion failues in 24 piglit tests with MESA_GL_VERSION_OVERRIDE=3.0, 12 of which are now passing. Reviewed-by: Marek Olšák <[email protected]>
* radeonsi: Expose pure integer vertex formatsMichel Dänzer2013-09-021-1/+6
| | | | | | Fixes 20 piglit tests with MESA_GL_VERSION_OVERRIDE=3.0. Reviewed-by: Marek Olšák <[email protected]>
* nvc0: restore viewport after blitMaarten Lankhorst2013-09-023-4/+7
| | | | | | | Based on calim's original fix in the nine branch. Signed-off-by: Maarten Lankhorst <[email protected]> Cc: "9.2 and 9.1" <[email protected]>
* radeon/uvd: save the aligned width & heightChristian König2013-09-021-0/+2
| | | | | | Fixes: https://bugs.freedesktop.org/show_bug.cgi?id=68845 Signed-off-by: Christian König <[email protected]>
* nvc0: delete compute object on screen destructionChristoph Bumiller2013-09-011-0/+1
| | | | Cc: "9.2" <[email protected]>
* nvc0: fix blitctx memory leakJoakim Sindholt2013-09-013-0/+9
| | | | Cc: "9.2 and 9.1" <[email protected]>
* nvc0: don't use bufctx in nvc0_cb_pushChristoph Bumiller2013-09-011-7/+3
| | | | Too many calls into libdrm when a single one is enough.
* nvc0: clear the flushed flagChristoph Bumiller2013-09-011-5/+4
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* nvc0/ir: add f32 long immediate cannot saturateChristoph Bumiller2013-09-011-0/+12
| | | | Cc: "9.2" <[email protected]>
* nvc0/ir: fix use after free in texture barrier insertion passTiziano Bacocco2013-09-011-1/+2
| | | | | | Fixes crash with Amnesia: The Dark Descent. Cc: "9.2 and 9.1" <[email protected]>
* nv30: find first unused texcoord rather than bailing if first is usedIlia Mirkin2013-09-011-2/+1
| | | | | | | This fixes shaders produced by supertuxkart. Cc: "9.2" <[email protected]> Signed-off-by: Ilia Mirkin <[email protected]>
* nouveau: initialise the nouveau_transfer mapsEmil Velikov2013-09-011-0/+2
| | | | | Cc: "9.2 and 9.1" <[email protected]> Signed-off-by: Emil Velikov <[email protected]>
* radeonsi: simplify and improve flushingMarek Olšák2013-08-3112-140/+125
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This mimics r600g. The R600_CONTEXT_xxx flags are added to rctx->b.flags and si_emit_cache_flush emits the packets. That's it. The shared radeon code tells us when the streamout cache should be flushed, so we have to check the flags anyway. There is a new atom "cache_flush", because caches must be flushed *after* resource descriptors are changed in memory. Functional changes: * Write caches are flushed at the end of CS and read caches are flushed at its beginning. * Sampler view states are removed from si_state, they only held the flush flags. * Everytime a shader is changed, the I cache is flushed. Is this needed? Due to a hw bug, this also flushes the K cache. * The WRITE_DATA packet is changed to use TC, which fixes a rendering issue in openarena. I'm not sure how TC interacts with CP DMA, but for now it seems to work better than any other solution I tried. (BTW CIK allows us to use TC for CP DMA.) * Flush the K cache instead of the texture cache when updating resource descriptors (due to a hw bug, this also flushes the I cache). I think the K cache flush is correct here, but I'm not sure if the texture cache should be flushed too (probably not considering we use TC for WRITE_DATA, but we don't use TC for CP DMA). * The number of resource contexts is decreased to 16. With all of these cache changes, 4 doesn't work, but 8 works, which suggests I'm actually doing the right thing here and the pipeline isn't drained during flushes. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: convert constant buffers to si_descriptorsMarek Olšák2013-08-315-128/+162
| | | | | | | | | | | | | | | There is a new "class" si_buffer_resources, which should be good enough for implementing any kind of buffer bindings (constant buffers, vertex buffers, streamout buffers, shader storage buffers, etc.) I don't even keep a copy of pipe_constant_buffer - we don't need it. The main motivation behind this is to have a well-tested infrastrusture for setting up streamout buffers. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: use r600_common_context, r600_common_screen, r600_resourceMarek Olšák2013-08-3128-777/+338
| | | | | | | | | Also r600_hw_context_priv.h and si_state_streamout.c are removed, because they are no longer needed. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* r600g: move streamout state to drivers/radeonMarek Olšák2013-08-3127-1486/+1825
| | | | | | | | | | | | | | | | | | | | | | | | This streamout state code will be used by radeonsi. There are new structures r600_common_context and r600_common_screen. What is inherited by what is shown here: pipe_context -> r600_common_context -> r600_context pipe_screen -> r600_common_screen -> r600_screen The common structures reside in drivers/radeon. Currently they only contain enough functionality to be able to handle streamout. Eventually I'd like the whole pipe_screen implementation to be shared and some of the context stuff too. This is quite big, but most changes are because of the new structures and the fact r600_write_value is replaced by radeon_emit. Thanks to Tom Stellard for fixing the build for r600g/compute. Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: cleanup initialization of SGPR shader parametersMarek Olšák2013-08-311-13/+19
| | | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* r600g,radeonsi: remove unused variablesMarek Olšák2013-08-312-8/+0
| | | | | | Reviewed-by: Michel Dänzer <[email protected]> Reviewed-by: Christian König <[email protected]> Tested-by: Tom Stellard <[email protected]>
* radeonsi: Do not suspend timer queriesNiels Ole Salscheider2013-08-306-14/+30
| | | | | Signed-off-by: Niels Ole Salscheider <[email protected]> Signed-off-by: Marek Olšák <[email protected]>
* softpipe: handle NULL sampler views for texture sampling / queriesRoland Scheidegger2013-08-301-5/+25
| | | | | | | Instead of crashing just return all zero. Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Zack Rusin <[email protected]>
* softpipe: check if so_target is NULL before accessing itRoland Scheidegger2013-08-301-2/+5
| | | | | | | | | | No idea if this is working right but copied straight from llvmpipe. (Not only does this check the so_target but also use buffer->data instead of buffer for the mapping.) Just trying to get rid of a segfault testing something else... Reviewed-by: Jose Fonseca <[email protected]> Reviewed-by: Zack Rusin <[email protected]>
* r600g: enable SB backend by defaultVadim Girlin2013-08-304-5/+6
| | | | | | | Signed-off-by: Vadim Girlin <[email protected]> Reviewed-by: Marek Olšák <[email protected]> Reviewed-by: Tom Stellard <[email protected]> Reviewed-by: Christian König <[email protected]>
* r600g: fix color exports when we have no CBsVadim Girlin2013-08-301-3/+4
| | | | | | | We need to export at least one color if the shader writes it, even when nr_cbufs==0. Signed-off-by: Vadim Girlin <[email protected]>
* nvc0/ir: Initialize NVC0LegalizePostRA member variables.Vinson Lee2013-08-291-1/+3
| | | | | | Fixes "Uninitialized pointer field" defects reported by Coverity. Signed-off-by: Vinson Lee <[email protected]>
* radeonsi: Early return if no depth or stencil on release builds.Vinson Lee2013-08-291-0/+1
| | | | | | | Fixes "Missing break in switch" defect reported by Coverity. Signed-off-by: Vinson Lee <[email protected]> Reviewed-by: Marek Olšák <[email protected]>
* freedreno: updates for msm drm/kms driverRob Clark2013-08-298-30/+55
| | | | | | | There where some small API tweaks in libdrm_freedreno to enable support for msm drm/kms driver. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: handle sync flags betterRob Clark2013-08-291-16/+34
| | | | | | | | We need to set the flag on all the .xyzw components that are written by the instruction, not just on .x. Otherwise a later use of rN.y (for example) will not trigger the appropriate sync bit to be set. Signed-off-by: Rob Clark <[email protected]>
* freedreno/a3xx/compiler: better const handlingRob Clark2013-08-291-90/+121
| | | | | | | | | Seems like most/all instructions have some restrictions about const src registers. In seems like the 2 src (cat2) instructions can take at most one const, and the 3 src (cat3) instructions can take at most one const in the first 2 arguments. And so on. Handle this properly now. Signed-off-by: Rob Clark <[email protected]>
* radeonsi: Make sure libdrm_radeon headers are picked up from the right placeJonathan Gray2013-08-291-1/+2
| | | | | | And remove libdrm/ from a winsys include statement. Signed-off-by: Jonathan Gray <[email protected]>
* radeon/uvd: fix MPEG2/4 ref frame index limitChristian König2013-08-291-2/+2
| | | | | | Otherwise the first few frames have an incorrect reference index. Signed-off-by: Christian König <[email protected]>
* nouveau: Copy m4x4 and m8x8 separately.Vinson Lee2013-08-281-1/+2
| | | | | | Silences Coverity "Out-of-bounds access" defect. Signed-off-by: Vinson Lee <[email protected]>
* r300g: enable MSAA on r300-r400, be careful about using color compressionMarek Olšák2013-08-274-5/+14
| | | | | | | | | | MSAA was tested by one user on RS690 and it works for him with color compression (CMASK) disabled. Our theory is that his chipset lacks CMASK RAM. Since we don't have hardware documentation about which chipsets actually have CMASK RAM, I had to take a guess based on the presence of HiZ. Reviewed-by: Alex Deucher <[email protected]>
* draw: clean up setting stream out information a bitRoland Scheidegger2013-08-276-29/+37
| | | | | | | | | | | | | | | | | In particular noone is interested in the vertex count, so drop that, and also drop the duplicated num_primitives_generated / so.primitives_storage_needed variables in drivers. I am unable for now to figure out if primitives_storage_needed in SO stats (used for d3d10) should increase if SO is disabled, though the equivalent num_primitives_generated used for OpenGL definitely should increase. In any case we were only counting when SO is active both in softpipe and llvmpipe anyway so don't pretend there's an independent num_primitives_generated counter which would count always. (This means the PIPE_QUERY_PRIMITIVES_GENERATED count will still be wrong just as before, should eventually fix this by doing either separate counting for this query or adjust the code so it always counts this even if SO is inactive depending on what's correct for d3d10.) Reviewed-by: Brian Paul <[email protected]>
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