summaryrefslogtreecommitdiffstats
path: root/src/gallium/drivers
Commit message (Expand)AuthorAgeFilesLines
* radeon/llvm: Remove the ReorderPreloadInstructions passTom Stellard2012-05-089-100/+4
* radeon/llvm: Remove old comment from AMDIL.hTom Stellard2012-05-081-5/+0
* radeon/llvm: add suport for cube texturesVadim Girlin2012-05-082-23/+91
* radeon/llvm: add support for CUBE ALU instructionVadim Girlin2012-05-085-21/+63
* radeon/llvm: add support for some ALU instructionsVadim Girlin2012-05-084-13/+293
* radeon/llvm: add missing cases for BREAK/CONTINUEVadim Girlin2012-05-082-0/+3
* radeon/llvm: add support for AHSR/LSHR/LSHL instructionsVadim Girlin2012-05-084-0/+53
* radeon/llvm: add support for TXQ/TXF/DDX/DDY instructionsVadim Girlin2012-05-085-4/+43
* radeon/llvm: add support for VertexID, InstanceIDVadim Girlin2012-05-083-0/+50
* radeon/llvm: fix live-in handling for inputsVadim Girlin2012-05-082-2/+3
* radeon/llvm: add support for v4i32Vadim Girlin2012-05-084-5/+20
* radeon/llvm: fix ABS_i32 instruction loweringVadim Girlin2012-05-081-2/+2
* radeon/llvm: use integer comparison for IFVadim Girlin2012-05-081-2/+4
* radeon/llvm: use bitcasts for integersVadim Girlin2012-05-083-5/+73
* r600g: Fix out of tree builds that use the LLVM backendTom Stellard2012-05-071-1/+1
* radeon/llvm: Remove references to DebugFlag and isCurrentDebugType()Tom Stellard2012-05-074-22/+3
* nv50: handle VP without inputsMarcin Slusarz2012-05-071-0/+11
* nvc0/ir: allow abs,neg source modifiers with ceil,floor,truncChristoph Bumiller2012-05-061-0/+3
* nv50/ir/opt: don't lose saturation in tryCollapseChainedMULsChristoph Bumiller2012-05-061-2/+3
* nvc0/ir: fix lowering of textureGradChristoph Bumiller2012-05-063-12/+13
* nouveau: fix nouveau_scratch_runout_release bo count underflowChristoph Bumiller2012-05-061-1/+3
* nv50: fix typo causing NULL-deref in nv50_resource_resolveChristoph Bumiller2012-05-041-1/+1
* nv50/ir: move expansion of IMUL to later stage and handle memory operandsChristoph Bumiller2012-05-044-17/+51
* nv50: implement stream outputChristoph Bumiller2012-05-0412-33/+468
* nv50: enable array texturesChristoph Bumiller2012-05-042-3/+4
* svga: specify 4-byte aligned vertex elementsBrian Paul2012-05-041-1/+2
* r600g/llvm: Mask write of pred_inst in llvm_if()Tom Stellard2012-05-031-0/+1
* r600g/llvm: Lower ULT A, B, C to SETGT_UINT A, C, BTom Stellard2012-05-031-0/+7
* r600g: Print integer values of literal constants in shader dumpsTom Stellard2012-05-031-1/+2
* r600g: Add support for reading BREAK_LOGICALZ_i32 from bytestreamTom Stellard2012-05-032-0/+5
* r600g/llvm: Don't duplicate R600 intrinsics installed by LLVMTom Stellard2012-05-034-0/+26
* r600g: Fix the evergreen offset/end register definitionsTom Stellard2012-05-021-9/+5
* radeon/llvm: Fix MachineInstr dumpTom Stellard2012-05-022-8/+9
* r600g: fixed the bug with VTX fetches in TEX clauses for evergreenAdam Rak2012-05-021-7/+6
* r600g: Add support for reading vertex fetches from bytestreamTom Stellard2012-05-021-0/+37
* r600g: Add support for reading native instructions from the LLVM bytestreamTom Stellard2012-05-021-0/+10
* r600g: Add FC_NATIVE instructionTom Stellard2012-05-023-0/+20
* r600g: bypass alpha for integer types (v2)Dave Airlie2012-05-024-2/+18
* gallivm: Added lp_build_const_mask_aos_swizzledJames Benton2012-05-021-9/+1
* llvmpipe: add masking support to aos blendJames Benton2012-05-023-6/+35
* llvmpipe: Added support for color masks in AoS blending.James Benton2012-05-024-33/+58
* radeon/llvm: Fix build for updated LLVM 3.1 release branchTom Stellard2012-05-012-18/+18
* softpipe: use any_swizzle() helper in sp_tex_sample.cBrian Paul2012-05-011-8/+15
* softpipe: whitespace, comment clean-ups in sp_tex_sample.cBrian Paul2012-05-011-26/+32
* softpipe: implement coord clamping for texel fetches (TXF)Brian Paul2012-05-011-14/+31
* radeon/llvm: Add subtarget feature: DumpCodeTom Stellard2012-05-015-6/+9
* r600g/llvm: Remove unnecessary dynamic castsDragomir Ivanov2012-04-301-5/+5
* r600g/llvm: Add pattern for llvm.AMDGPU.kill v2Dragomir Ivanov2012-04-302-1/+6
* r600g/llvm: Fix handling of MASK_WRITE instructionsTom Stellard2012-04-302-1/+3
* radeon/llvm: Use a custom emit function for TGSI_OPCODE_KILTom Stellard2012-04-301-1/+16
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-28 05:25:50 +0000